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In this paper, the design methodology of switched-tank converter (STC) is presented. The power loss breakdown analysis is conducted to point out the directions and paths for components optimization. It is revealed that the switching device conduction loss, printed circuit board (PCB) loss, and inductor loss become significant when output power is >150 W. Power loss of four switches is calculated and compared for switching device selection. The resonant capacitor is carefully designed to meet both current stress and ripple requirements. On the other hand, optimal design of the resonant inductors and PCB layout are fully investigated. The core loss model is provided, and different core materials are compared to minimize the core loss. Besides, a fine-tuned inductor winding structure is designed to achieve the lowest winding loss. Furthermore, PCB layout is optimized to get short loop length for each operation state. In addition to the hardware level optimization, an improved control method is proposed, in which the conduction time of switching devices is tuned to mitigate the circulating power. To verify the optimization work, a prototype of STC is built and tested. The experimental results indicate that a state-of-the-art performance of 98.71% efficiency and a 1000 W/in3 high power density is achieved. [ABSTRACT FROM AUTHOR]

Achieving high efficiency and high power density features of intermediate bus converter (IBC) in data center application is very critical. This paper proposes a nonisolated switched-tank dc–dc converter (STC) to meet the high requirement of IBC. The proposed STC has fixed voltage conversion ratio. Theoretical analysis provides the guideline for designing resonant tank and nonresonant tank as well as selecting proper deadtime for the proposed circuit. With resonant operation feature of the proposed circuit, zero current switching is realized on all switching devices to help the high-efficiency operation of the proposed converter. Through the proposed design methodology in this paper, power loss on switching devices and planar inductors can be minimized. In addition, detailed power loss analysis and breakdown provide hints for further efficiency improvement. Simulation has been performed to validate the operating principle of the proposed STC. A designed 6x STC (450 W nominal/600 W maximum) based on eGaNFETs is demonstrated. With 54 V typical input voltage, the output of the 6x STC is 9 V. The GaN-based prototype achieves a peak efficiency of 98.55%. Also, it achieves 97.18% efficiency and 750 W/in3 power density at 450 W. [ABSTRACT FROM AUTHOR]