Search

Vertical diamond Schottky diodes with blocking voltages VBD > 2.4kV and ON-resistances RON < 400m Ω cm2 were fabricated on homoepitaxially grown diamond layers with different surface morphologies. The morphology (smooth as-grown, hillock-rich, polished) influences the Schottky barrier, the carrier transport properties, and ultimately the device performance. The smooth as-grown sample exhibited a low reverse current density JRev < 10−4 A/cm2 for reverse voltages up to 2.2 kV. The hillock-rich sample blocked similar voltages with a slight increase in the reverse current density (JRev < 10−3 A/cm2). The calculated 1-D breakdown field, however, was reduced by 30%, indicating a field enhancement induced by the inhomogeneous surface. The polished sample demonstrated a similar breakdown voltage and reverse current density as the smooth as-grown sample, suggesting that a polished surface can be suitable for device fabrication. However, statistical analysis of several diodes of each sample showed the importance of the substrate quality: a high density of defects both reduces the feasible device area and increases the reverse current density. In forward direction, the hillock-rich sample exhibited a secondary Schottky barrier, which could be fit with a modified thermionic emission (TEM) model employing the Lambert W-function. Both polished and smooth samples showed nearly ideal TEM with ideality factors 1.08 and 1.03, respectively. Compared with the literature, all three diodes exhibit an improved Baliga figure of merit for diamond Schottky diodes with VBD > 2 kV. [ABSTRACT FROM AUTHOR]

The integration of AlGaN/GaN thin film transistors onto diamond substrates enables the efficient dissipation of device heat, thus providing a boost in performance and reliability of current high-frequency GaN power amplifiers. In this paper, we show 3 GHz load-pull measurements of GaN transistors on silicon (Si) and single crystalline diamond (SCD) as fabricated by our recently presented direct low-temperature bond process. After the transfer onto SCD, the efficiency and output power are increased by 15%, which is explained by a calculated temperature difference of ∼100 K. In addition, the temperature between individual gate fingers is reduced such that the output power density (Pout) is independent of the amount of fingers. A drawback of our GaN epilayer is identified in the huge thermal resistance of the buffer layer so that the heat spreading performance of our technology is significantly impaired. Nevertheless, we demonstrate a large GaN-on-diamond output power of 14.4 W at a Pout of 8.0 W/mm. [ABSTRACT FROM AUTHOR]