Search

This paper briefly studies the method of collecting audio signals and the method of adding noise to audio signals. It comprehensively applies various basic knowledge of digital signal processing, and then performs spectrum analysis on noise-free frequency signals and spectral analysis of noise-added frequency signals, and filtering processing. Through theoretical derivation, the corresponding conclusions are drawn, and then MATLAB is used as a programming tool to carry out computer implementation to verify the conclusions derived. In the research process, the filter processing was completed by designing the IIR digital filter and the FIR digital filter, and MATLAB was used to draw the graphics and calculate and simulate some data in the whole design. [ABSTRACT FROM AUTHOR]

Digital Finite Impulse Response (FIR) filters are frequently used in Digital Signal Processing (DSP) by virtue of stability and easy implementation. The problem of designing the multiplier block of a digital FIR filter has received a significant amount of attention during the last decade, as the filters require a large number of multiplications, leading to excessive area, delay, and power consumption even if implemented in a full custom integrated circuit. Previous works have focused on the design of filters with minimum area by replacing the multiplication operations with constant coefficients by addition, subtraction, and shifting operations. Since shifts can be implemented with only wires in hardware, the design problem can be defined as the minimization of the number of addition/subtraction operations to implement the coefficient multiplications. This problem is generally known as the MCM problem. In the last decade, many efficient algorithms have been proposed for the MCM problem. These algorithms can be categorized in two classes: Common Subexpression Elimination (CSE) and graph-based algorithms. While the CSE algorithms basically find the common non-zero digit patterns on the representations of the constants, the graph-based algorithms are not restricted to a particular number representation and synthesize the constants iteratively by building a graph. However, in the algorithms proposed for the MCM problem, an addition/subtraction operation is assumed to be a two-input operation that is generally implemented using a Ripple Carry Adder (RCA) block yielding great latency in the implementation of MCM. In high-speed applications, particularly in DSP systems, Carry-Save Adder (CSA) blocks are preferred to RCA blocks taking into account the increase in area. Despite the large number of algorithms designed for the minimization of addition/subtraction operations based on RCAs, there are only a few algorithms proposed for the optimization of the number of CSA blocks. Although these algorithms give good results, they are based on heuristics, i.e., provide no indication on how far from the minimum their solutions are. To the best of our knowledge, there is no exact algorithm proposed for the optimization of the number of CSA blocks in MCM. In this paper, an exact CSE algorithm designed for the minimization of the number of CSA blocks is introduced. In the exact CSE algorithm, initially, all possible implementations of filter coefficients and partial terms using CSAs are found when filter coefficients are defined under a number representation, and a combinational network that represents the implementations of constants is constructed. Then, the minimization of the number of CSA blocks problem is defined as a 0-1 Integer Linear Programming (ILP) problem with a cost function to be minimized and constraints to be satisfied.… [ABSTRACT FROM AUTHOR]

In this paper, an energy-efficient estimation and detection problem is formulated for low-power digital filtering. Building on the soft digital signal processing technique proposed by Hegde and Shanbhag, which combines algorithmic noise tolerance and voltage scaling to reduce power, the proposed minimum power soft error cancellation (MP-SEC) technique detects, estimates, and corrects transient errors that arise from voltage overscaling. These timing violation-induced errors, called soft errors, can be detected and corrected by exploiting the correlation structure induced by the filtering operation being protected, together with a reduced-precision replica of the protected operation. By exploiting a spacing property of soft errors in certain architectures, MP-SEC can achieve up to 30% power savings with no signal-to-noise ratio (SNR) loss and up to 55% power savings with less than 1-dB SNR loss, according to the logic-level simulations performed for an example 25-tap frequency-selective filter. [ABSTRACT FROM AUTHOR]

A closed-form expression is given for the correlation functions of generalized Hermite wavelets, constructed from an also generalized definition of Hermite polynomials. Due to their Gaussianity, these wavelets can be used as a tool in the analysis or design of systems involving nonsinusoidal wavelets as well as to model impulsive waveforms found in real-world applications and signal processing problems. As such, the formula is potentially applicable to various areas of science. [ABSTRACT FROM AUTHOR]

This paper presents the design and implementation of high-speed, multiplierless, arbitrary bandwidth sharp FIR filters based on frequency-response masking (FRM) technique. The FRM filter structure has been modified to improve the throughput rate by replacing long band-edge shaping filter in the original FRM approach with two to three cascaded short filters. The proposed structure is suitable for FPGA as well as VLSI implementation for sharp digital FIR filters. It is shown by an example that a near 200-tap equivalent Remez FIR filter can be implemented in a single Xilinx XC4044XLA device that operates at sampling frequency of 5.5 MHz. [ABSTRACT FROM AUTHOR]

In this paper, we propose a design method of perfect reconstruction (PR) nonuniform filter banks. Filter banks are roughly separated into nonparaunitary and paraunitary ones. Paraunitary filter banks have some advantages: for example, the frequency responses of synthesis filters are identical to those of analysis filters. However, the severe constraint makes it difficult to design them and, especially in the nonuniform case, the design method becomes complex for some frequency-division cases. Thus, we concentrate on nonparaunitary filter banks and present a design method for nonuniform filter banks with arbitrary lengths and frequency divisions. © 1997 Scripta Technica, Inc. Electron Comm Jpn Pt 3, 80(10): 51–59 1997 [ABSTRACT FROM AUTHOR]

This paper describes an efficient structure for generalized lapped orthogonal transforms (GenLOT) for finite-duration sequences, which we expect to be used for subband image coding. When linear convolution is carried out on the finite-duration sequences and filter, the number of points in the output signal increases. Therefore, the linear convolution is not desirable in subband image coding. In order to solve this problem, the convolution is carried out after the finite-duration sequences are symmetrically and periodically extended (symmetric extension method). This method is superior to circular convolution because the former method causes less distortion at the signal boundaries. In the GenLOT structure proposed in this paper, the symmetric extension can be realized without redundant operations due to signal extension and, furthermore, with fast implementation. This structure is considered to be a generalization of the lapped orthogonal transform (LOT) for finite-duration sequences. In addition, its application to the M-band discrete-time wavelet transform (DTWT) will be described. Finally, it will be shown that an efficient structure for finite-duration sequences can be realized in the M-band DTWT. © 1997 Scripta Technica, Inc. Electron Comm Jpn Pt 3, 80(10): 39–50, 1997 [ABSTRACT FROM AUTHOR]

There are some applications that require oversampled filter banks, for example, adaptive signal processing using multirate filter banks. Little study was done, however, for such filter banks compared with maximally decimated ones. In this paper, we propose a design method for oversampled filter banks which satisfy the perfect reconstruction and linear phase properties. Moreover, we consider the design method for both orthogonal and biorthogonal ones. When the decimation ratio is not a divisor of the number of channels, we find it impossible for analysis and synthesis filters to have the same frequency responses by considering the mechanism of aliasing cancellation. In other words, biorthogonal filter banks can be designed under an arbitrary decimation ratio, while it is restricted to a divisor of the number of channels in the orthogonal case. We first derive the conditions for perfect reconstruction and linear phase for both biorthogonal and orthogonal ones. Then, we present the design method for both cases. Finally, some design examples are shown. © 1997 Scripta Technica, Inc. Electron Comm Jpn Pt 3, 80(10): 78–86, 1997 [ABSTRACT FROM AUTHOR]

The filter on monolithic LSI for communication and measurement is realized by the digital signal processor (DSP) or the switched capacitor (SC) circuit. In the analog-digital interface, high-speed processing, applications requiring low power consumption operations, and low cost, SC circuits will be superior to the DSP circuits. The authors devised the SC circuit called parallel cyclic-type, which can further enhance the high-frequency and low power-consumption operation. The single-rate FIR and IIR filters have been proposed using the circuit. In this paper, the high frequency and low power-consumption FIR and IIR decimation filters using the SC parallel cyclic-type circuits are proposed. The effects of the finite gain bandwidth (GB product) of the operational amplifier and of the parasitic capacitance on the filter characteristics are analyzed. The proposed filters and the decimation filter by Franca et al. are constructed using discrete elements and the characteristics are examined. The characteristics are compared with the computer simulations. It is verified as a result that the proposed decimation filter has a much better performance than the filter by Franca et al. [ABSTRACT FROM AUTHOR]

Control and protection equipment in power systems requires higher sensitivity and operational reliability to meet today's changing power system requirements. The voltage-measuring deviation requirement for advanced voltage and var control equipment is less than 0.1 percent under conditions of harmonic distortion in the voltage waveform and power-system frequency variation. Studies on digital signal processing suitable for electric power systems showed that these requirements are satisfied using fast sampling and very fast 32-bit floating point operations by a Digital Signal Process (DSP). This paper describes the design philosophy of a high-precision power system voltage-measuring method using fast sampled data. In addition, total voltage-measuring deviation characteristics under a combination of the techniques are described along with digital filter characteristics, frequency-measuring deviation characteristics, frequency variation versus gain-compensation characteristics of a digital filter, and peak value operating principles. [ABSTRACT FROM AUTHOR]