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The steady rise in the deployment of grid-connected inverters is driving a need for more efficient and accurate grid synchronization techniques. In this paper, digital implementation methods are proposed to increase grid synchronization accuracy when an integrated filter is used. First, a method to compensate for the computational delays in the implementation of integrated filters with numerical integrations is presented. Second, a simple method to estimate the grid frequency is introduced for updating the center frequency of integrated filters. The proposed methods have been implemented in a digital signal processor and tested with a real-time simulator. They achieve ripple errors of 0.14 mHz and 0.008° in the frequency and phase angle estimations, respectively. [ABSTRACT FROM AUTHOR]

The acquisition of biopotentials can be seen as a very important practice in the search for understanding about biological systems. Recent advances in biopotential analysis, such as electroencephalography (EEG) signals, allow to construct new brain machine interfaces (BMI), capable of offering alternative solutions for disabled individuals. Once it is possible to identify some brainwave patterns, such as an individual blinking or with eyes closed, this study proposes to acquire EEG signals of individuals in these two situations, using a digital signal processor and a firmware, for their processing and analysis. Therefore, the measurements were carried out using a OpenBCI™ Ganglion GS board. The software performs digital filtering of the accquired data, and analyzes them in the time and frequency domains. This analysis enables the identification of brainwave patterns associated with eye movement. From these results, future work might apply the solutions in acquisition of EEG signals and BMIs, using neural networks such as extreme learning machines. [ABSTRACT FROM AUTHOR]

This paper briefly studies the method of collecting audio signals and the method of adding noise to audio signals. It comprehensively applies various basic knowledge of digital signal processing, and then performs spectrum analysis on noise-free frequency signals and spectral analysis of noise-added frequency signals, and filtering processing. Through theoretical derivation, the corresponding conclusions are drawn, and then MATLAB is used as a programming tool to carry out computer implementation to verify the conclusions derived. In the research process, the filter processing was completed by designing the IIR digital filter and the FIR digital filter, and MATLAB was used to draw the graphics and calculate and simulate some data in the whole design. [ABSTRACT FROM AUTHOR]

Filter model reduction is an important optimization method in digital signal processing. A method of FIR to FIR model reduction using SDP optimization is proposed in this paper. At first, we use SDP to design an original FIR filter. Then we name a general K-order FIR digital filter H 1 z − 1 with coefficient values equal to the first K + 1 filter coefficient values of H 0 z − 1 . Finally, we design a new general K-order FIR digital filter H 2 z − 1 connected in parallel with H 1 z − 1 using SDP optimization. The experiment results show this method has good performance on the magnitude error and the linear phase in passband. Therefore, this method can be used in the field of digital signal processing. [ABSTRACT FROM AUTHOR]

Hearing impairment is a commonly observed human health problem across the world. In "hearing loss", hearing sensitivity is reduced. To treat hearing loss problem, hearing assistive devices are used. Hearing aids restore hearing ability for those having hearing problems. But with today's most advanced technologies in hearing aids, patients still have some difficulty in understanding speech in crowded areas. Hearing aid has hearing loss match up and adjustment of the hearing aid characteristics according to an individual patient. Digital hearing-aid device amplifies sound selectively by use of digital filters and the processed signal is transferred to the ear. Hearing-aid designers are continuously trying to minimize background sounds and noise with these additional directional microphones, adaptable noise reduction filters and uses of binaural hearing aid technologies to improve localization. Lots of studies have been already done to design digital filters for selective amplification. Most of the available hearing-aid designs have digital filter bank and fixed sub-band structure. Previous research aims at creating band decomposition, and the research is focused on using less complex algorithms for accomplishment of the decomposition of signals. The paper reviews available designs and reconfigurable digital filter banks to achieve the best fitting to audiogram. [ABSTRACT FROM AUTHOR]

Assessing high-frequency (HF) distortion (HFD) in power systems is a new challenge in the framework of in situ power quality monitoring. The International Electrotechnical Commission (IEC) suggests the use of a high-pass filter in the measurement chain, which can be analog (with a dedicated channel for HF assessment) or integrated into its digital form into the signal processing (SP) stage, in order to reduce the measurement uncertainty. This paper proposes a desynchronized processing technique (DPT) as an effective alternative to the other digital filtering techniques presented in the literature, which also allows for a potential simplification of the measurement hardware. The DPT performance is analyzed by means of numerical experiments and laboratory measurements performed using two different test beds and both 16- and 24-bit analog-to-digital converters (ADCs). The test beds are used to evaluate the combined contribution of the ADC and the SP stage to the whole measurement chain uncertainty and identify achievable accuracy levels for different frequency ranges and magnitudes of HFD. The results highlight the strengths of the DPT compared to other techniques and demonstrate its potential to include HF in a comprehensive waveform distortion assessment in power systems. [ABSTRACT FROM AUTHOR]

The paper presents the development of an algorithm to obtain stable allpass filter, which acts as a group delay equalizer, with the aim to equalize group delay of the polynomial IIR filter in a maximal flat sense. The proposed method relies on a set of nonlinear equations, derived directly from the flatness conditions of the group delay response at the origin in the z -plane, with the order to obtain the unknown values of the allpass filter coefficients. The algorithm implemented in the MATLAB platform returns the coefficients of allpass filter. In the given example, first we construct a minimum phase polynomial IIR digital filter with a maximally flat magnitude at origin, next we augment the system with cascade connection of nonminimum allpass digital filter with order to equalize the group delay response of the whole filter in a maximally flat sense. [ABSTRACT FROM AUTHOR]

Abstract Pulse digitization at high rates has paved the way for the use of complex, non-standard algorithms, beyond the conventional constant fraction discriminator (CFD) option to obtain the time-stamps of gamma photons arriving to nuclear detectors. Detector pulses can be shaped with digital filters in digital signal processing (DSP) hardware or software, and timestamps can be derived by interpolating or extrapolating the acquired samples. Digitized pulses can be stored in a computer for off-line analysis allowing for many different algorithm variations to be tried on the same data. One difficulty is that the number of filters and parameters to be tuned in order to optimize the timing performance may become too large to be done by hand. For this, in this work we use a genetic algorithm to tune in-silico digital filters, digital time pickup algorithms and their associated parameters. The data set consisted of 500,000 pulses obtained from the last dynode of two ultrafast photomultiplier tubes (model R9779 by Hamamatsu) coupled to monolithic fast inorganic LaBr 3 (Ce) scintillators, in a truncated cone geometry 1.5 × 1 × 1.5". With finely tuned conventional (CFD+TAC) timing electronics, a CRT of 155 ps (FWHM) for a 60Co source has been measured by our group, within the state of the art for detectors of this size. Our alternate digital, in-silico implementation of CFD+TAC, fine-tuned with the same parameters obtained during manual adjustment of the conventional DAQ and applied to pulses digitized at 5 GS/s and 14 bits of vertical resolution, reproduces the performance of the conventional DAQ. On the other hand, a genetic algorithm (GA) is employed to optimize digital recursive filters with up to 8 parameters, and different time-pickup strategies (upper level thresholding, CFD, time extrapolation). The same 500,000 pulses are employed for which the GA finds several families of filters outperforming the manually tuned algorithm by more than 10%. [ABSTRACT FROM AUTHOR]

Cuckoo search algorithm (CSA) is relatively a new optimization technique with less control parameters and strong exploration ability. Due to the random search associated with CSA, it requires large number of functional evaluations for obtaining optimal solution. An improved algorithm, named as improved global-best-guided CSA, is presented here based on the best solution of previous iteration for the optimal design of multiplierless two-dimensional recursive digital filters. The most important feature of the proposed algorithm is that it is completely self-adaptive with no tuning parameters, whereas in CSA the replacement factor needs to be adjusted. The proposed algorithm exhibits 52% improvement in fitness function evaluation (for p = 2) and the execution time is reduced by 56% in comparison with the existing algorithms. Further, the proposed algorithm has been tested for several benchmark problems and found to exhibit significant performance improvement. [ABSTRACT FROM AUTHOR]

In this paper, a new sign-normalized least-mean-square adaptive filtering algorithm based on IIR spline adaptive filter (IIR-SAF-SNLMS) is proposed. By using the absolute value of the a posteriori error as the cost function and solving the optimization problem, the proposed algorithm achieves robustness against impulsive noise. Furthermore, to further improve the performance of the IIR-SAF-SNLMS, its variable step-size variant is proposed. Simulation results in the identification of the IIR-SAF nonlinear model show that the proposed algorithms provide better tracking and steady-state performance as compared to the existing spline algorithms. [ABSTRACT FROM AUTHOR]

Making use of Hilbert-pair-based digital filtering, intensity modulation and passive optical coupling, optical filter- and O-E-O conversion-free flexible ROADMs are, for the first time, experimentally demonstrated to perform DSP-enabled dynamic add/drop operations at wavelength, sub-wavelength and spectrally overlapped sub-band levels. Extensive experimental explorations of physical-layer add/drop operation performances and their robustness to variations in both differential optical power dynamic range and drop RF signal power are also undertaken in IMDD-based optical network nodes. It is shown that the ROADM add/drop operation performances are independent of the sub-band spectral location, and that the add/drop operations introduce optical power penalties of ≤ 1.8 dB. In addition, for a total optical power as low as −12 dBm, the add operation still can tolerate a differential optical power dynamic range of > 2 dB. Whilst for the drop operation, an optical power penalty of < 2 dB is observed over a drop RF signal power variation range of 7.1 dB. Experimental results indicate that the add/drop operations of DSP-switched ROADMs have excellent performance robustness to considerably relax stringent requirements on network components. [ABSTRACT FROM AUTHOR]

Newly proposed DSP-enabled ROADMs free from O − E − O conversions offer an excellent opportunity of utilising advanced DSP techniques to greatly simplify complicated conventional ROADM configurations, to introduce more highly desired networking functionalities and to create a programmable environment capable of addressing elastic 5G slicing and supporting the SDN paradigm. In this paper, detailed analytical and numerical investigations are performed, for the first time, of DSP-enabled ROADM drop operation performances in coherent systems. Two simple but effective drop operation approaches are proposed analytically and validated numerically, which, compared to the previously published quadrature-point-biased Mach–Zehnder modulator-based ROADM drop element subject to a standard drop RF signal, can not only improve the minimum required OSNR requirements by approximately 10 dB, but also considerably enhance the drop operation performance robustness to modulation index variations. [ABSTRACT FROM AUTHOR]

Multichannel linear filters, such as the Multichannel Wiener Filter (MWF) and the Generalized Eigenvalue (GEV) beamformer are popular signal processing techniques which can improve speech recognition performance. In this paper, we present an experimental study on these linear filters in a specific speech recognition task, namely the CHiME-4 challenge, which features real recordings in multiple noisy environments. Specifically, the rank-1 MWF is employed for noise reduction and a new constant residual noise power constraint is derived which enhances the recognition performance. To fulfill the underlying rank-1 assumption, the speech covariance matrix is reconstructed based on eigenvectors or generalized eigenvectors. Then the rank-1 constrained MWF is evaluated with alternative multichannel linear filters under the same framework, which involves a Bidirectional Long Short-Term Memory (BLSTM) network for mask estimation. The proposed filter outperforms alternative ones, leading to a 40% relative Word Error Rate (WER) reduction compared with the baseline Weighted Delay and Sum (WDAS) beamformer on the real test set, and a 15% relative WER reduction compared with the GEV-BAN method. The results also suggest that the speech recognition accuracy correlates more with the Mel-frequency cepstral coefficients (MFCC) feature variance than with the noise reduction or the speech distortion level. [ABSTRACT FROM AUTHOR]

The maximally flat variable-delay (VD) digital filter can be derived by using the discrete-Pascal-transform (DPT) and the DPT-based Pascal-polynomial interpolation. In this paper, we develop an efficient structure for the low-complexity and high-modularity implementation of this Pascal-type VD filter. As compared to other existing filter structures, this new structure greatly reduces the multiplication operations required in the filtering process. Roughly speaking, the proposed new structure can reduce the multiplication operations by almost one-third. Thus, this new filter structure has the lowest filter complexity among all the existing filter structures for the implementation of the maximally flat VD filter. As a result, signal interpolation can be efficiently performed through utilizing this new filter structure. As opposed to other existing structure with transient problem, we will show that the proposed new structure does not involve any transient problem. That is, it is a transient-free structure. Consequently, the proposed new filter structure can achieve more accurate signal-interpolation results than other structures that have the transient problem. Finally, we show that this proposed structure also has high modularity and it is suited for modularized hardware implementation. [ABSTRACT FROM PUBLISHER]

The main objective of this paper is to design and implement minimum multiplier, low latency structures of a comb filter. Multipliers are the most area and power consuming elements; therefore, it is desirable to realize a filter with minimum number of multipliers. In this paper, design of comb filters based on lattice wave digital filters (LWDF) structure is proposed to minimize the number of multipliers. The fundamental processing unit employed in LWDF requires only one multiplier. These lattice wave digital comb filters (LWDCFs) are realized using Richards' and transformed first-order and second-order all-pass sections. The resulting structural realizations of LWDCFs exhibit properties such as low coefficient sensitivity, high dynamic range, high overflow level, and low round-off noise. Multiplier coefficients of the proposed structures are implemented with canonic signed digit code (CSDC) technique using shift and add operations leading to multiplierless implementation. This contributes in reduction of number of addition levels which reduces the latency of the critical loop. A field programmable gate array (FPGA) platform is used for evaluation and testing of the proposed LWDCFs to acquire advantages of the parallelism, low cost, and low power consumption. The implementation of the proposed LWDCFs is accomplished on Xilinx Spartan-6 and Virtex-6 FPGA devices. By means of examples, it is shown that the implementations of the proposed LWDCFs attain high maximum sampling frequency, reduced hardware, and low power dissipation compared with the existing comb filter structures. Copyright © 2017 John Wiley & Sons, Ltd. [ABSTRACT FROM AUTHOR]

Finite impulse response (FIR) filters have been widely used in many digital signal processing applications because of their interesting properties such as phase linearity, bounded-input-bounded-output (BIBO) stability and easy implementation. However, the implementation of high order filters requires many multipliers. Several authors have proposed new methods such as multiple constant multiplication (MCM), distributed arithmetic (DA) and signed-powers-of-two (SPT) to avoid the use of multipliers by using the minimum number of registers. Nevertheless, the implementation of these strategies generates critical paths that limit their performance. In this work, we propose a compact hardware architecture to compute FIR filters at high processing speeds using new parallel neural multipliers. The scalability of the system enables the construction of many neural multiplier units for higher order FIR filters. To validate the proposal, the hardware architecture was implemented on the Kintex-7 field programmable gate array (FPGA) development kit. The results demonstrate that this new approach can be interfaced with the conventional binary systems to improve advanced signal processing applications such as high quality media contents, wireless communication and biomedical systems. [ABSTRACT FROM AUTHOR]

Digital signal processing techniques have been widely used in radiation spectrometry to provide improved stability and performance with compact physical size over the traditional analog signal processing. In this paper, field-programmable gate array (FPGA)-based adaptive digital pulse shaping techniques are investigated for real-time signal processing. National Instruments (NI) NI 5761 14-bit, 250-MS/s adaptor module is used for digitizing high-purity germanium (HPGe) detector’s preamplifier pulses. Digital pulse processing algorithms are implemented on the NI PXIe-7975R reconfigurable FPGA (Kintex-7) using the LabVIEW FPGA module. Based on the time separation between successive input pulses, the adaptive shaping algorithm selects the optimum shaping parameters (rise time and flattop time of trapezoid-shaping filter) for each incoming signal. A digital Sallen–Key low-pass filter is implemented to enhance signal-to-noise ratio and reduce baseline drifting in trapezoid shaping. A recursive trapezoid-shaping filter algorithm is employed for pole-zero compensation of exponentially decayed (with two-decay constants) preamplifier pulses of an HPGe detector. It allows extraction of pulse height information at the beginning of each pulse, thereby reducing the pulse pileup and increasing throughput. The algorithms for RC–CR2 timing filter, baseline restoration, pile-up rejection, and pulse height determination are digitally implemented for radiation spectroscopy. Traditionally, at high-count-rate conditions, a shorter shaping time is preferred to achieve high throughput, which deteriorates energy resolution. In this paper, experimental results are presented for varying count-rate and pulse shaping conditions. Using adaptive shaping, increased throughput is accepted while preserving the energy resolution observed using the longer shaping times. [ABSTRACT FROM PUBLISHER]

This paper presents the online implementation and performance evaluation of the phaselet-based method for detecting electric faults in induction motor drives (IMDs). The online implementation of tested fault detection method is achieved using a digital signal-processing board, where the inputs are the 3φ stator currents and the output is a trip signal. The desired fault feature is extracted using six digital high-pass filters, whose coefficients have been obtained using phaselet basis functions that are generated by the biorthogonal 2.1 scaling function. The performance of the phaselet-based fault detection method is tested for two different IMDs that are fed across-the-line and through a frequency drive system, when operated at different loading levels. Experimental test results show accurate, reliable, and fast fault detection, along with negligible sensitivity to the speed, loading levels, IMD ratings, and fault type. [ABSTRACT FROM PUBLISHER]

This paper presents development and implementation of a novel digital signal processing algorithm for on-line estimation of peak value of the fundamental component of a non-sinusoidal power system signal. The algorithm relies on stable band-pass first and second degree digital integrator based rigorous mathematical deduction and recombines itself with zero-crossing avoiding technique. Compared with the well-established technique such as the enhanced phase-locked-loop (EPLL) based system, the proposed algorithm provides higher degree of immunity and insensitivity to harmonics and noise, and faster response. Based on simulation studies, performances of the proposed algorithm at different operating conditions have been presented and its accuracy and response time have been compared with the EPLL systems. Moreover, a simple laboratory setup implemented by MATLAB and dedicated hardware is built to verify the performance of the proposed algorithm in real time applications. The framework of laboratory prototype has been given out and the necessary modification in proposed algorithm for on-line implementation has been discussed. [ABSTRACT FROM AUTHOR]

The article points out that there is a technical error in the main result of induced l∞ stability of fixed-point digital filters without overflow oscillations and instability due to finite wordlength effects and also presents an approach to correcting the main result. Topics include the proposed induced l∞ stability criterion stated to be applicable for the worstcase peak value of the state vector for all bounded peak values of the disturbance signals.

Sampling frequency selection is a key issue in direct digitalization of the radio frequency (RF) signals. In this paper, we propose a cylindrical surface spectrum and arc distance-based sampling frequency selection method for multiband RF signals. In this method, a 3D visual expression of cylindrical surface spectrum of digital signal is introduced. This expression reflects better the circulatory nature of the spectrum of digital signals. It is found more intuitive, heuristic, and effective in dealing with undersampling issues of multiband RF signals than conventional spectrum expressions are. A function of arc distance between two frequency bands are also introduced which turns out to be useful in the determination of sampling frequency and design of digital filters. [ABSTRACT FROM AUTHOR]

As constructing multi-D wavelets remains a challenging problem, we propose a new method called prime coset sum to construct multi-D wavelets. Our method provides a systematic way to construct multi-D non-separable wavelet filter banks from two 1-D low-pass filters, with one of which being interpolatory. Our method has many important features including the following: 1) it works for any spatial dimension, and any prime scalar dilation; 2) the vanishing moments of the multi-D wavelet filter banks are guaranteed by certain properties of the initial 1-D low-pass filters, and furthermore; 3) the resulting multi-D wavelet filter banks are associated with fast algorithms that are faster than the existing fast tensor product algorithms. [ABSTRACT FROM PUBLISHER]

An algorithm is proposed for performing neutron-physical calculations of a reactor using digital signal processing methods. It is shown that the algorithm's combined use of the classical methods of numerical analysis and high-frequency digital filters makes it possible to calculate accurately and rapidly the neutron macrofield on a coarse grid and to organize the neutron-physical calculations in a new way, greatly reducing the number of iterations on a fine grid. Computer modeling shows that even for a one-dimensional reactor the proposed rational combination of the computational results on coarse and fine grids gives a several-fold reduction of the computing time. [ABSTRACT FROM AUTHOR]

In this paper a numerically efficient method for designing a nearly optimal variable fractional delay (VFD) filter based on a simple and well-known window method is presented. In the proposed method a single window extracted from the optimal filter with fixed fractional delay (FD) is divided into even and odd part. Subsequently, the odd part is discarded and symmetric even part of the extracted window is used to design a family of nearly optimal filters with varying FD. In addition to window extraction, the proposed approach requires filter gain correction which is dependent on the desired FD. Optimum values of the gain correction factor as well as the extracted window can be computed beforehand, which allows us to design a nearly optimal FD filter with arbitrary FD at low numerical costs during runtime. On the basis of the proposed filter design method, the universal structure of VFD filter allowing for change of filter type and length has been proposed. In the paper, three FD filter optimality criteria are considered, which are maximal flatness, Chebyshev (minimax), and least squares. [ABSTRACT FROM AUTHOR]

Modern digital signal processors (DSPs) execute diverse applications ranging from digital filters to video decoding. These applications have drastically different arithmetic precision and scratch pad memory (SPM) size requirements. To minimize power consumption, DSPs often support aggressive dynamic voltage/frequency scaling (DVFS) techniques, requiring on-chip memory, such as SPM, to operate at low voltages. However, increasing process variations with aggressive technology scaling have significantly increased the failure rate of on-chip memory designed with small transistors operating at low voltages. Consequently, designs must use either larger and/or more transistors to have memory cells satisfy a target minimum operating voltage ( V MIN ) under a failure rate constraint. Yet using larger and/or more transistors for the SPM, which consumes a large fraction of the chip area, is costly. In this paper, we first propose SPM designs that exploit (i) the characteristics of applications and (ii) the tradeoffs between memory cell size and V MIN . Our approach can reduce the SPMs chip area by up to 17% and V MIN by up to 52.5 mV. Second, we exploit the error-tolerant characteristics of some applications. Our proposed SPM can support lower V MIN with less mean square error than a conventional SPM with shortened word width. For error-sensitive applications that require high precision, we can lower V MIN at the cost of reduced memory capacity. This approach may negatively impact the performance of applications with large memory footprints. However, we demonstrate that such applications are typically constrained by their execution latency requirements and are likely to operate at higher voltages/frequencies than applications with smaller memory footprints to satisfy their real-time execution constraints. [ABSTRACT FROM AUTHOR]

There is need to develop a portable experimental platform for digital signal processing. In order to solve this problem, using DSP ( Digital Signal Processor) + FPGA ( Field Programmable Gate Array) as the hardware platform, a low-cost, portable digital signal processing experimental system is designed. Digital signal processor TMS320VC5509A is used as data processing core. FPGA is applied to control USB, ADC, DAC and the other peripheral devices, so that the experimental system can communicate with the PC and complete conversion between analog and digital signals. Besides, the platform can also implement the classical digital signal processing algorithms, such as spectral analysis, digital filter design, etc. Hardware debug shows that the platform can generate the basic signal for digital signal processing, and it can implement the basic experimental content for DSP course. The experimental platform can greatly enhance intuitive of the digital signal processing course. [ABSTRACT FROM AUTHOR]

This paper presents the design of a field-programmable gate array (FPGA)-based motion controller for robotic applications. In contrast to digital signal processor and microprocessor implementations, the control period of this system is fixed. Foregoing implementations on FPGA require microprocessor-based platforms for data interchange tasks consuming a large amount of resources; consequently, they could not be implemented on low logic density devices, or they use IP cores which limits the implementation of the system to only certain device families. This new motion controller architecture integrates control and communication modules in a single chip which permits an increase to the number of axis according to the system requirements. The proposed design presents a low consumption of logic resources; therefore, a considerable cost saving per axis is achieved. The system test has been carried out with a three-degree of freedom selective compliant assembly robot arm robot and a standard PC as master device. The digital filter parameters have been tuned by using a crossover frequency method. Step and profiled motion responses obtained show very good performance. [ABSTRACT FROM AUTHOR]

Signal Wizard Systems® is a digital signal processing (DSP) research venture within the School of EEE at the University of Manchester, UK. It specialises in the development and supply of realtime DSP products for audio signal analysis and processing. The unique and underpinning philosophy of these products is their ease of use. The systems require minimal knowledge of DSP theory on the part of the user and none of the mathematics associated with digital filter design. Filters and other algorithms can be designed in seconds, downloaded and executed in real time with just a few mouse clicks. Since 2004 Signal Wizard products have been sold all over the world for applications ranging from noise suppression, adaptive filtering and system modelling to musical instrument research. In particular, their ease of use ensures that they are ideally suited for teaching simple and more advanced concepts in DSP both at undergraduate and postgraduate level. For this purpose, a DSP laboratory teaching package has been developed using the Signal Wizard range of devices, and has proven an invaluable tool for training our student cohort in the practical aspects of DSP engineering design and programming. [ABSTRACT FROM AUTHOR]

Scientific CCDs designed in thick high resistivity silicon (Si) are excellent detectors for astronomy, high energy and nuclear physics, and instrumentation. Many applications can benefit from CCDs ultra low noise readout systems. The present work shows how sub electron noise CCD images can be achieved using digital signal processing techniques. These techniques allow 0.4 electrons of noise at readout bandwidths of up to 10 Kpixels per second while keeping the full CCD spatial resolution and signal dynamic range. [ABSTRACT FROM AUTHOR]

The arithmetic mean and the order statistical median are two fundamental operations in signal and image processing. They have their own merits and limitations in noise attenuation and image structure preservation. This paper proposes an iterative algorithm that truncates the extreme values of samples in the filter window to a dynamic threshold. The resulting nonlinear filter shows some merits of both the fundamental operations. Some dynamic truncation thresholds are proposed that guarantee the filter output, starting from the mean, to approach the median of the input samples. As a by-product, this paper unveils some statistics of a finite data set as the upper bounds of the deviation of the median from the mean. Some stopping criteria are suggested to facilitate edge preservation and noise attenuation for both the long- and short-tailed distributions. Although the proposed iterative truncated mean (ITM) algorithm is not aimed at the median, it offers a way to estimate the median by simple arithmetic computing. Some properties of the ITM filters are analyzed and experimentally verified on synthetic data and real images. [ABSTRACT FROM AUTHOR]

Digital systems dedicated to audio and speech processing usually require sample rate conversion units in order to adapt the sample rate from different signal flows: for instance 8 and 16 kHz for speech, 32 kHz for the broadcast rate, 44.1 kHz for CDs, and 48 kHz for studio work. The designer chooses the sample rate conversion (SRC) technology based on objective criteria, such as figures of complexity, development or integration cycle and of course performance characterization. The performances of the fractional SRC system include the in-band and the aliasing characterization plus its distortion behavior due to internal rounding errors. The paper shows the existence of a new compound time-invariant system made of multiple instances of the same SRC system. The characterization of the original SRC is obtained from the linear and distortion characteristics of this time-invariant system. Regular methods for characterizing time-invariant systems apply. The SRC system can be analyzed in black box conditions, either in batch processing or in real-time processing. Examples illustrate the capability of the method to fully recover characteristics and rounding noise behavior from actual SRC implementations. [ABSTRACT FROM PUBLISHER]

Filtering is the most common task in digital signal processing, when some particular parameters of the input signal are removed or modified and a new signal is obtained at the output. The most common filtering goal is to remove noise from a signal. Digital filtering deals with discrete sequences, their implementation require both soft and hard solutions. This work focuses on some useful methods to implement digital filters in reconfigurable hardware structures, as FPGAs. This paper presents FIR filters of different order and structures, and using the MathWorks® tools, shows how these structures can be mapped to the Xilinx® FPGA architecture. The implemented digital filters are evaluated through signal to noise ratio and root mean square error between the filtered and the noisy signal. [ABSTRACT FROM AUTHOR]

A simple algorithm to improve the identification accuracy of protein coding regions (exons) in Deoxyribonucleic Acid (DNA) sequences exploiting period-3 property is proposed. Three base periodicity is quite pronounced in exons and is commonly used in Digital Signal Processing (DSP) based methods to locate the exonic regions. Improvement in the accuracy of the protein coding regions has been achieved by extracting the background noise that comes from long range correlation present in DNA sequences and then eliminating this noise from the period-3 power spectrum. Proposed algorithm is data independent as it does not requires the empirical determination of any parameter for increasing the discrimination between coding and non-coding regions of a DNA sequence. Performance of the algorithm has been evaluated on F56F11 C.elegans chromosome-III nucleotide sequences. Performance of this algorithm has been compared with the spectral content method and an improvement in the correlation coefficient (CC), the performance metric used in this work, is observed. [ABSTRACT FROM AUTHOR]

In this article, we show that when targets are closely spaced, traditional tracking algorithms can be adjusted to perform better under a performance measure that disregards identity. More specifically, we propose an adjusted version of the joint probabilistic data association (JPDA) filter, which we call set JPDA (SJPDA). Through examples and theory we motivate the new approach, and show its possibilities. To decrease the computational requirements, we further show that the SJPDA filter can be formulated as a continuous optimization problem which is fairly easy to handle. Optimal approximations are also discussed, and an algorithm, Kullback–Leibler SJPDA (KLSJPDA), which provides optimal Gaussian approximations in the Kullback–Leibler sense is derived. Finally, we evaluate the SJPDA filter on two scenarios with closely spaced targets, and compare the performance in terms of the mean optimal subpattern assignment (MOSPA) measure with the JPDA filter, and also with the Gaussian-mixture cardinalized probability hypothesis density (GM-CPHD) filter. The results show that the SJPDA filter performs substantially better than the JPDA filter, and almost as well as the more complex GM-CPHD filter. [ABSTRACT FROM PUBLISHER]

Abstract: Gamma-ray spectroscopic systems with high efficiency and energy resolution have become important in many fields. Conventional systems with analog shaping are being replaced by digital systems that can provide higher throughput, better energy resolution and better stability. Therefore, we present the development of our new versatile real time Multi-Channel Analyzer with digital signal processing, the GMCA. The device has two independent channels and is compatible to various detectors like Coplanar Grid (Cd,Zn)Te, HPGe, LaBr3, NaI and CsI. Different sensors for temperature, pressure and humidity provide additional information. In this work we will show energy resolution measurements and compare spectra measured with different detectors connected to our system and to commercial systems, both analog and digital. [Copyright &y& Elsevier]

This article presents a new method for designing two-band quadrature mirror filter (QMF) banks. Analytic solution of the filter coefficients is obtained in the s-domain. The characteristic function of the new filter has one multiple pole in the pass-band and one multiple zero in the stop-band. As a consequence, the transfer function has a single ripple, both in the pass-band and in the stop-band. Lowpass and highpass filter pair is double complementary in the s-plane. The gain responses of the lowpass and highpass filter pair at the crossover frequency are approximately 3 dB below their maximum values. Using the bilinear transformation, the analogue filter transfer function is mapped into the corresponding digital filter transfer function, so that the analogue crossover frequency is mapped into the digital frequency corresponding to ω = π/2. The filter characteristic exhibits Butterworth-like behaviour near the origin and Chebyshev-like behaviour (of the third order) near the pass-band edge. [ABSTRACT FROM AUTHOR]

Abstract: NMR spectroscopy in biology and medicine is generally performed in aqueous solutions, thus in 1H NMR spectroscopy, the dominant signal often stems from the partly suppressed solvent and can be many orders of magnitude larger than the resonances of interest. Strong solvent signals lead to a disappearance of weak resonances of interest close to the solvent artifact and to base plane variations all over the spectrum. The AUREMOL-SSA/ALS approach for automated solvent artifact removal and baseline correction has been originally developed for multi-dimensional NMR spectroscopy. Here, we describe the necessary adaptations for an automated application to one-dimensional NMR spectra. Its core algorithm is still based on singular spectrum analysis (SSA) applied on time domain signals (FIDs) and it is still combined with an automated baseline correction (ALS) in the frequency domain. However, both steps (SSA and ALS) have been modified in order to achieve optimal results when dealing with one-dimensional spectra. The performance of the method has been tested on one-dimensional synthetic and experimental spectra including the back-calculated spectrum of HPr protein and an experimental spectrum of a human urine sample. The latter has been recorded with the typically used NOESY-type 1D pulse sequence including water pre-saturation. Furthermore, the fully automated AUREMOL-SSA/ALS procedure includes the managing of oversampled, digitally filtered and zero-filled data and the correction of the frequency domain phase shift caused by the group delay time shift from the digital finite response filtering. [Copyright &y& Elsevier]

One-bit signal processing based on delta-sigma modulation has been studied for hardware implementation of signal processing systems. In the 1-bit signal processing, finite word-length problems such as overflow and coefficient quantization error occur. To solve the problems, a new design method with state space is proposed in this paper. Digital filters are designed to show the feasibility of the method. First, the L/ L-sensitivity is shown to evaluate coefficient quantization error and L scaling constraints to prevent overflow. Second, a state space equation is presented and the L/ L-sensitivity and L-scaling constraints are extended to take the filter structure and oversampling effects into account. Finally, the proposed method is shown to attain a higher SNR than conventional ones. © 2011 Wiley Periodicals, Inc. Electr Eng Jpn, 175(4): 48-56, 2011; Published online in Wiley Online Library (). DOI 10.1002/eej.21075 [ABSTRACT FROM AUTHOR]

In the hardware implementation of FIR (Finite Impulse Response) digital filters, it is desirable to reduce the total number of nonzero digits used for representation of the filter coefficients. In general, the design problem of FIR filters with CSD (Canonical Signed Digit) representation, which is efficient for reduction of the number of multiplier units, is often treated as a 0-1 combinational problem. In such problems, certain difficult constraints hinder linearization of the problem. Although many kinds of heuristic approaches have been used to solve the problem, the solutions obtained in such a manner cannot be guaranteed to be optimal. In this paper, we attempt to formulate the design problem as a 0-1 mixed integer linear programming problem and to solve it by using the branch and bound technique, which is a powerful method for solving integer programming problems. Several design examples are presented to illustrate the efficient performance of the proposed method. © 2011 Wiley Periodicals, Inc. Electron Comm Jpn, 94(6): 10-16, 2011; Published online in Wiley Online Library (). DOI 10.1002/ecj.10331 [ABSTRACT FROM AUTHOR]

An optimal design method for stable IIR (Infinite Impulse Response) filters under the min-max criterion is proposed. The design problem considered is the complex Chebyshev approximation of a rational function including the stability constraint. We formulate this problem as a problem of real linear semi-infinite programming problem using the real rotation theorem. The problem is solved by the three-phase method; one of the methods is used for solving semi-infinite programming problems. The three-phase method includes three operations. In the first operation, some active constraint candidates are selected by the iterative simplex method. Next, the second operation integrates some degenerate constraints. In the third operation, the approximate solution obtained up to the second operation is adjusted so as to satisfy the optimality condition. The filters designed by the method are found to be more precise than those designed by the conventional method. Several design examples are presented to demonstrate the effectiveness of the proposed method. © 2011 Wiley Periodicals, Inc. Electron Comm Jpn, 94(6): 17-23, 2011; Published online in Wiley Online Library (). DOI 10.1002/ecj.10330 [ABSTRACT FROM AUTHOR]

Abstract: This paper presents a new recursive algorithm to directly obtain the sum of the autocorrelation functions of the M sequences belonging to a Complementary Set of Sequences (M-CSS). The proposed algorithm allows a digital filter with only one stage to be obtained, what significantly reduces the total number of memory requirements, multiplications and additions to be performed in comparison with the use of M correlators, even when these correlators could have an efficient implementation. The use of this algorithm can be of great relevancy since there is an increasing interest in the use of CSS (or derived sequences such as Loosely Synchronized—LS-sequences or Zero Correlation Zone—ZCZ-sequences) in the field of communications and sensor systems. [Copyright &y& Elsevier]

Barcodes have been extensively adopted in daily life, such as in merchandise labels, inventory control, storage/retrieval systems and inspection. Computer-vision-based barcode recognition can definitely facilitate barcode reading, especially for multiple barcodes and free orientation and in complex scenarios. This work, presents an automatic barcode detection and recognition algorithm for multiple and rotation invariant barcode decoding. The proposed system comprises three stages. First, the barcode is extracted by coarse-to-fine segmentation in four steps: background small clutter reduction, candidate barcode segmentation, barcode verification and barcode rotation and regularization. To enhance the barcode region, thin and small background noise clusters are eliminated using Max-Min Differencing. The approach combines several image-processing schemes, namely Gaussian smoothing filtering, connected component analysis, orientation homogeneity, moment analysis and iterative thresholding. The second stage decodes the barcode by scanning multiple traversal lines, thus preventing decoding errors due to minor barcode defects. Finally, the proposed system is implemented and optimized on a DM6437 DSP EVM board. Experimental results indicate that the proposed approach can locate multiple and omnidirectional barcodes, even with a complex background and minor distortion. The recognition rates for 10,395 lottery barcodes and 388 merchandise barcodes are 99.74 and 90.7%, respectively. The proposed system is promising and has been successfully adopted in commercial applications of lottery reading and verification of winning numbers. [ABSTRACT FROM AUTHOR]

The discrete pulse transform (DPT) is a decomposition of an observed signal into a sum of pulses, i.e., signals that are constant on a connected set and zero elsewhere. Originally developed for 1-D signal processing, the DPT has recently been generalized to more dimensions. Applications in image processing are currently being investigated. The time required to compute the DPT as originally defined via the successive application of LULU operators (members of a class of minimax filters studied by Rohwer) has been a severe drawback to its applicability. This paper introduces a fast method for obtaining such a decomposition, called the Roadmaker's algorithm because it involves filling pits and razing bumps. It acts selectively only on those features actually present in the signal, flattening them in order of increasing size by subtracing an appropriate positive or negative pulse, which is then appended to the decomposition. The implementation described here covers 1-D signal as well as two and 3-D image processing in a single framework. This is achieved by considering the signal or image as a function defined on a graph, with the geometry specified by the edges of the graph. Whenever a feature is flattened, nodes in the graph are merged, until eventually only one node remains. At that stage, a new set of edges for the same nodes as the graph, forming a tree structure, defines the obtained decomposition. The Roadmaker's algorithm is shown to be equivalent to the DPT in the sense of obtaining the same decomposition. However, its simpler operators are not in general equivalent to the LULU operators in situations where those operators are not applied successively. A by-product of the Roadmaker's algorithm is that it yields a proof of the so-called Highlight Conjecture, stated as an open problem in 2006. We pay particular attention to algorithmic details and complexity, including a demonstration that in the 1-D case, and also in the case of a complete graph, the Roadmaker's algorithm has optimal complexity: it runs in time \cal O(m), where m is the number of arcs in the graph. [ABSTRACT FROM AUTHOR]