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This letter derives and discusses the superiority of a simple dc-link capacitor voltage control configuration for multilevel neutral-point-clamped converters with any number of levels. The control involves n − 2 control loops regulating the difference between the voltage of neighbor capacitors. These control loops are inherently decoupled, i.e., they are independent and the control action of one loop does not affect the others. This method is proven to be equivalent to previously published approaches, with the added advantages of increased simplicity and scalability to a higher number of levels, all while imposing a lower computational burden. The good performance of such control is confirmed through simulations and experiments. [ABSTRACT FROM AUTHOR]

The present paper provides a solution to operate multilevel dual active bridge (ML-DAB) converters built upon neutral point clamped switching legs in a full-bridge disposition and with any number of levels on either side of the converter. The main issue of such converters is addressing the inherent unbalance of the dc-link capacitor voltages, which hinders the proper operation and optimum utilization of the converter. The proposed solution comprises a generalized to N levels modulation and control scheme that allows operating these converters, while guaranteeing the proper balance of the dc-link capacitor voltages. The suitability of the proposed solution is verified through simulation and experimental tests performed in five different converter configurations, three of them with an asymmetric number of voltage levels, proving that capacitor voltage balance is achievable in a wide range of operation conditions. Moreover, the efficiency of the ML-DAB converters is demonstrated to be superior to the conventional two-level DAB case. [ABSTRACT FROM AUTHOR]

Aiming to improve the performance features of conventional two-level dual-active-bridge (DAB) converters, this paper presents a three-level neutral-point-clamped (NPC) DAB dc–dc converter. A general modulation pattern is initially defined, the dc-link capacitor voltage balancing is analyzed in detail, and a proper balancing control is designed. Then, a set of decoupled optimization problems is formulated as a function of the available modulation degrees of freedom to minimize the predominant converter losses. Finally, a simple and practical specific modulation strategy is provided, resembling the optimum solutions. The good performance of the proposed three-level NPC DAB converter operated with the proposed modulation strategy and voltage balancing control is verified through simulation and experiments. The capacitor voltage balancing can be guaranteed for all operating conditions. In addition, it is concluded that the multilevel topology provides benefits compared with the conventional two-level DAB converter. [ABSTRACT FROM PUBLISHER]

This paper presents a capacitor voltage balancing control applicable to any multilevel dc–ac converter formed by a single set of series-connected capacitors implementing the dc link and semiconductor devices, such as the diode-clamped topology. The control is defined for any number of dc-link voltage levels and converter legs (for single-phase and multiphase systems), guaranteeing the capacitor voltage control for any modulation index value and load (from idle mode to full power). The associated control loop small-signal transfer function is presented, from which optimum compensator design guidelines are derived. The improvement in control performance is verified through simulation and experiments comparing with a previous balancing control strategy in a four-level three-phase dc–ac conversion system. The satisfactory control performance is also verified through simulation in a four-level five-phase dc–ac conversion system. [ABSTRACT FROM PUBLISHER]

Voltage total harmonic distortion and quadratic voltage ripple criteria are accepted figures of merit of a multilevel pulse width modulation (PWM) converter voltage quality. The dominating frequency domain approach does not deliver simple closed-form expressions and practically requires accounting up to 40–50 switching harmonics. Assuming infinitely high switching frequency, suggested time domain approach to a multilevel multiphase PWM voltage quality evaluation provides closed-form piece-wise analytical solutions. These simple formulas clearly reveal the dependence on modulation index for arbitrary voltage level and odd phase numbers. The results are applicable to any type of multilevel converters (including interleaved, open winding and other) operated with nearest level/nearest space vector modulation and relatively high switching frequency. [ABSTRACT FROM PUBLISHER]

Low-voltage ride-through (LVRT) requirements demand wind-power plants to remain connected to the network in presence of grid-voltage dips. Most dips present positive-, negative-, and zero-sequence components. Hence, regulators based on symmetrical components are well suited to control gridconnected converters. A neutral-point-clamped topology has been considered as an active front end of a distributed power-generation system, following the trend of increasing power and voltage levels in wind-power systems. Three different current controllers based on symmetrical components and linear quadratic regulator have been considered. The performance of each controller is evaluated on LVRT requirement fulfillment, grid-current balancing, maximum grid-current value control, and oscillating power flow. Simulation and experimental results show that all three controllers meet LVRT requirements, although different system performance is found for each control approach. Therefore, controller selection depends on the system constraints and the type of preferred performance features. [ABSTRACT FROM AUTHOR]

Abstract-In the previous literature, the introduction of the virtual-space-vector (VV) concept for the three-level, three-leg neutral-point-clamped converter has led to the definition of pulsewidth modulation (PWM) strategies, guaranteeing a dc-link capacitor voltage balance in every switching cycle under any type of load, with the only requirement being that the addition of the three phase currents equals zero. This paper presents the definition of the VVs for the general case of an n-level converter, suggests guidelines for designing VV PWM strategies, and provides the expressions of the leg duty-ratio waveforms corresponding to this family of PWMs for an easy implementation. Modulations defined upon these vectors enable the use of diode-clamped topologies with passive front-ends. The performance of these converters operated with the proposed PWMs is compared to the performance of alternative designs through analysis, simulation, and experiments. [ABSTRACT FROM AUTHOR]

In photovoltaic (PV) power systems where a set of series-connected PV arrays (PVAs) is connected to a conventional two-level inverter, the occurrence of partial shades and/or the mismatching of PVAs leads to a reduction of the power generated from its potential maximum. To overcome these problems, the connection of the PVAs to a multilevel diode-clamped converter is considered in this paper. A control and pulsewidth-modulation scheme is proposed, capable of independently controlling the op- erating voltage of each PVA. Compared to a conventional two-level inverter system, the proposed system configuration allows one to extract maximum power, to reduce the devices voltage rating (with the subsequent benefits in device-performance characteristics), to reduce the output-voltage distortion, and to increase the system efficiency. Simulation and experimental tests have been conducted with three PVAs connected to a four-level three-phase diode-clamped converter to verify the good performance of the proposed system configuration and control strategy. [ABSTRACT FROM AUTHOR]

This paper proposes a closed-loop control implementation fully-embedded into an FPGA for a permanent-magnet synchronous motor (PMSM) drive based on a four-level active-clamped converter. The proposed FPGA controller comprises a field-oriented control to drive the PMSM, a DC-link voltage balancing closed-loop control (VBC), and a virtual-vector-based modulator for a four-level active-clamped converter. The VBC and the modulator operate in consonance to preserve the DC-link capacitor voltages balanced. The FPGA design methodology is carefully described and the main aspects to achieve an optimal FPGA implementation using low resources are discussed. Experimental results under different operating conditions are presented to demonstrate the good performance and the feasibility of the proposed controller for motor-drive applications. [ABSTRACT FROM AUTHOR]