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The five-level nested neutral-point-clamped (5L-NNPC) converter is one of the most promising topologies for medium-voltage (2.3–7.2 kV) high-power applications such as medium-voltage drives, wind energy conversion systems, and grid-connected systems. The 5L-NNPC requires a fewer number of switching devices, freewheeling and clamping diodes, and flying capacitors compared to the existing five-level multilevel converters. In the 5L-NNPC topology, each flying capacitor voltage is regulated at one-fourth of the dc-bus voltage to obtain the five-level operation. Due to the lack of redundant switching states, it is difficult to control the flying capacitor voltages by using the pulse-width-modulation-based classical control methods. This paper proposes a model-predictive current control (MPCC) approach to control the flying capacitor voltages along with the output currents of the 5L-NNPC converter. The discrete-time model of 5L-NNPC is developed to implement the MPCC scheme. The simulation and experimental studies are conducted to verify the dynamic and steady-state performance of 5L-NNPC with the MPCC scheme. The performance of the proposed MPCC approach is compared with the conventional space-vector-modulation-based voltage-balancing approach. Furthermore, the flying capacitor voltage control capability of MPCC is verified at different load power factors. [ABSTRACT FROM AUTHOR]

The five-level modular neutral-point-clamped (5L-MNPC) converter is realized by connecting two three-level neutral-point-clamped modules in series. For five-level operation, each dc-bus capacitor voltage of the modular neutral-point-clamped topology should be regulated at one-fourth of the net dc-bus voltage. In this letter, a simple voltage-balancing approach based on the carrier-based modulation scheme is proposed to achieve the above objectives. The proposed approach uses the redundancy switching states along with the current direction and the instantaneous value of the dc-bus capacitor voltage to achieve the voltage balancing in the 5L-MNPC topology. The dynamic performance of the 5L-MNPC topology with the proposed voltage-balancing approach is verified experimentally. [ABSTRACT FROM AUTHOR]

In a modular multilevel converter (MMC), the voltage balance among the submodules is mandatory to generate the multilevel stepped waveform across the load and to ensure the equal voltage stress on the semiconductor devices. In addition, the output power quality (voltage and current waveforms) and the converter reliability greatly depend on the design methodology of a voltage-balancing approach. The improper design of the balancing approach causes higher voltage and current harmonic distortion and device power losses, which further affects the efficiency of the MMC. In this letter, an improved voltage-balancing approach is proposed to reduce the output voltage harmonic distortion and device power losses. The performance of the proposed approach is verified through MATLAB simulations and experimentally on a three-level-flying-capacitor-based MMC system. Also, the performance of the proposed approach is compared with the existing methodology to prove its superiority. [ABSTRACT FROM AUTHOR]

The three-level flying capacitor (3L-FC) submodule significantly reduces the magnitude of circulating currents, voltage ripple, and footprint size and improves the efficiency of the modular multilevel converter (MMC). Due to the above advantages, the 3L-FC submodule becomes an alternative for the conventional half-bridge submodule in the MMC. Each 3L-FC submodule consists of two floating capacitors with different nominal voltage rating. The precharging of floating capacitors without inrush current is one of the major challenges in the 3L-FC-based MMC. This paper proposes a sequence of design steps to precharge the floating capacitors in the 3L-FC-based MMC. The proposed approach is highly effective to charge the outer and inner capacitors of each 3L-FC submodule to their nominal value. The superiority of the proposed approach is verified through the MATLAB simulations and dSPACE/DS1103 experiments on a laboratory prototype of the 3L-FC-based MMC. [ABSTRACT FROM AUTHOR]

In a modular multilevel converter (MMC), the zero-sequence currents at twice the fundamental frequency and its multiples flow through the dc bus and cause dc-bus power fluctuations during unbalanced conditions. These fluctuations appear in dc-bus current, considering that the dc-bus voltage is stiff. In this paper, a model-predictive control is proposed to minimize the ripple in dc-bus current. The proposed approach takes the advantage of internally generated zero-sequence voltage to mitigate the zero-sequence current during unbalanced conditions. To implement the proposed approach, a generalized mathematical model of the MMC, which includes the zero-sequence voltage, is presented. The performance of the proposed approach is verified through MATLAB/Simulink simulations on a 4.16-kV/5-MW system and dSPACE/DS1103-based experiments on a 208-V/3-kW laboratory prototype. [ABSTRACT FROM AUTHOR]

Arm voltage and submodule (SM) capacitor voltage balancing is a key factor for the safe and reliable operation of modular multilevel converters (MMCs). The arm voltage balancing is achieved through a zero-sequence voltage controller in carrier pulse-width modulation (CPWM). In this study, a dual space-vector pulse-width modulation (SVPWM) technique is proposed for an MMC, which eliminates the external controller for arm voltage balancing. In this approach, the three-phase top and bottom arms are independently controlled using SVPWM. In addition, the capacitor voltage balancing can be achieved using redundant switching vectors. However, this will increase the computational load on the space-vector modulator. Therefore, an external capacitor voltage-balancing approach is proposed to minimize the computational complexity. The proposed approach uses the direction of load current instead of the arm current in SM selection process. As such, the required number of current sensors is reduced to 50% in a three-phase system. The proposed modulation and voltage-balancing approach are simulated and experimentally verified on the MMC system with three-level flying capacitor (3L-FC) SMs. Simulation and experimental results show the successful balancing of the arm voltage and SM capacitors voltage. [ABSTRACT FROM PUBLISHER]

Discontinuous pulse-width modulation (PWM) techniques result in reduced power loss in voltage source inverters. This study presents the space vector approach to the three-level discontinuous PWM technique. The switching sequences for four basic types of discontinuous PWM and the implementation are presented. An improved discontinuous PWM algorithm is presented for low modulation index region. All these algorithms are verified experimentally and the results are presented. The performance of discontinuous PWM algorithms is compared with that of conventional space vector-based PWM algorithms. [ABSTRACT FROM AUTHOR]