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The performance of theoretical ultrahigh-voltage power semiconductor devices has been predicted by means of numerical simulations using the Sentaurus technology computer-aided design tool. A general silicon carbide punch-through insulated-gate bipolar transistor (IGBT) structure has been implemented with suitable physics-based models and parameters to reflect the device characteristics in a wide range of device blocking voltages from 20 to 50 kV. The models for 20 kV class IGBTs have been implicitly validated by means of published experimental results. Mixed-mode simulations were performed that predicted total switching energy loss densities of 335, 629, 906, and 999 mJ/cm2 for 20, 30, 40, and 50 kV class devices, respectively, at 25 °C, JC = 20 A/cm2, and an ambipolar carrier lifetime of 20 μs. While the IGBT on-state forward voltage drop reduces, the switching losses increase with higher charge-carrier lifetime for a given current density (e.g., 20 A/cm2). The large span of simulation results will be used as an input support to the design of future high-power converters. [ABSTRACT FROM AUTHOR]

Future meshed high-voltage direct current grids require modular multilevel converters with extended functionality. One of the most interesting new submodule topologies is the semi-full-bridge because it enables efficient handling of dc-side short circuits while having reduced power losses compared to an implementation with full-bridge submodules. However, the semi-full-bridge submodule requires the parallel connection of capacitors during normal operation, which can cause a high redistribution current in case the voltages of the two submodule capacitors are not equal. The maximum voltage difference and resulting redistribution current have been studied analytically by means of simulations and in a full-scale standalone submodule laboratory setup. The most critical parameter is the capacitance mismatch between the two capacitors. The experimental results from the full-scale prototype show that the redistribution current peaks at 500 A if the voltage difference is 10 V before paralleling and increases to 2500 A if the difference is 40 V. However, neglecting very unlikely cases, the maximum voltage difference predicted by simulations is not higher than 20–30 V for the considered case. Among other measures, a balancing controller is proposed, which reduces the voltage difference safely if a certain maximum value is surpassed. The operating principle of the controller is described in detail and verified experimentally on a down-scaled submodule within a modular multilevel converter prototype. It can be concluded that excessively high redistribution currents can be prevented. Consequently, they are no obstacle for using the semi-full-bridge submodule in future HVdc converters. [ABSTRACT FROM AUTHOR]

The feasibility of future multiterminal dc (MTDC) systems depends largely on the capability to withstand dc-side faults. Simulation models of MTDC systems play a very important role in investigating these faults. For such studies, the test system needs to be accurate and computationally efficient. This paper proposes a detailed equivalent model of the modular multilevel converter (MMC), which is used to develop the MTDC test system. The proposed model is capable of representing the blocked-mode operation of the MMC, and can be used to study the balancing control of the capacitor voltages. In addition, the operation of the MMC when redundant submodules are included in the arms can also be studied. A simplified model of a hybrid high-voltage dc breaker is also developed. Hence, the developed test system is capable of accurately describing the behavior of the MMC-based MTDC system employing hybrid HVDC breakers, during fault conditions. Using time-domain simulations, permanent dc-side faults are studied in the MTDC system. In addition, a scheme to control the fault current through the MMC using thyristors on the ac side of the converter is proposed. [ABSTRACT FROM AUTHOR]

In modular multilevel converters, there is a tradeoff between the switching frequency and the voltage ripple in the submodule capacitors. The reason for this is that it becomes increasingly difficult to balance the capacitor voltages when the switching frequency is reduced. This paper presents a new submodule circuit, which improves the balancing of the capacitor voltages at low switching frequencies. The proposed submodule circuit consists of two capacitors and eight switches, forming a three-level submodule. Ideally, the voltage and current ratings of the switches can be chosen such that the combined power rating of the semiconductors is the same as for the equivalent solution with conventional halfbridge submodules. The proposed submodule circuit provides the possibility of connecting the two capacitors in parallel when the intermediate voltage level is used. This will reduce the capacitor voltage ripple, especially at low switching frequencies, and thus, allow for a reduction of the size, weight, and cost of the submodule capacitors. The proposed submodule circuit is validated by both simulations and experimental results. It is found that the parallel connection of the submodule capacitors will, in fact, significantly improve the balancing of the capacitor voltages. [ABSTRACT FROM AUTHOR]

A high-voltage tapped-inductor buck converter utilizing a novel autonomous high-voltage valve is presented in this paper. Its application as auxiliary power supply for high-power cascaded-converter submodules is discussed, followed by a presentation of the most challenging problems in designing a low-power high-voltage step-down converter. The TI-buck converter topology is analyzed, which together with the novel autonomous high-voltage valve overcomes most of the problems. Analytical expressions describing the operation as well as circuit simulations are presented. Finally, an experimental evaluation of a 3-kV 70-W prototype converter utilizing the proposed autonomous high-voltage valve with series-connected super-junction MOSFETs is presented. [ABSTRACT FROM PUBLISHER]

Many publications have been presented on the modulation and control of the modular multilevel converter, some of which are based on phase-shifted carrier modulation. This paper presents an analysis of how the switching frequency affects the capacitor voltages, circulating currents, and alternating voltages using phase-shifted carrier modulation. It is found that switching frequencies that are integer multiples of the fundamental frequency should be avoided as they can cause the capacitor voltages to diverge. Suitable switching frequencies are derived for which the arm and line quantities will be periodic with symmetric operating conditions in the upper and lower arms. Thus, the practical outcome of this paper is a detailed description of how the switching frequency should be chosen in order to achieve advantageous operating conditions. The theoretical results from the analysis are validated by both simulations and experimental results. [ABSTRACT FROM AUTHOR]

Variable-speed drives have reduced voltage requirements when operating below the base speed. In a modular-multilevel-converter-based (M2C-based) motor drive, it is then possible to operate with reduced voltage in the submodule capacitors, than at the base speed. In this sense, a greater capacitor-voltage ripple can be accommodated, without exceeding the maximum peak-capacitor voltage. This paper presents an analytical investigation for the optimal selection of the average capacitor voltage for M2Cs, when the motor is operating with rated torque, below the base speed. This method does not require any power exchange between the converter arms, so it keeps the conduction losses at the minimum level. Additionally, the method decreases the switching losses, due to the decreased capacitor-voltage level. The overall ratings of the converter remain the same as in the base-speed operation. It is shown that this method can be applied at a speed range between the base speed and down to approximately one third of it, i.e., an operating range that covers the requirements for typical pump- and fan-type applications. The results obtained from the analytical investigation are experimentally verified on a down-scaled laboratory prototype M2C. [ABSTRACT FROM AUTHOR]

The balancing of the capacitor voltages in modular multilevel converters becomes increasingly difficult when the switching frequency is reduced. Typically, a reduced switching frequency will increase the spread in the capacitor voltages and, thus, the voltage ripple in the individual submodules. This paper presents a capacitor voltage balancing strategy which aims to combine a low switching frequency with a low capacitor-voltage ripple. This is done by a predictive algorithm that controls the converter in such a way that the stored charge in the submodule capacitors is evenly distributed among all the submodules when the capacitor voltages reach their maximum values. In this way, it is possible to limit the peak voltages in the submodule capacitors at switching frequencies as low as 2-3 times the fundamental switching frequency. The proposed capacitor voltage balancing strategy is validated by both simulations and experimental results with 130-Hz and 140-Hz switching frequency. In the simulations, the capacitor voltage ripple was reduced by 24% compared to the case when a conventional sorting algorithm is used, and the experimental results show that it is possible to combine the proposed voltage balancing strategy with a circulating-current controller. [ABSTRACT FROM AUTHOR]

This paper introduces a new method for the preliminary design of power controllers (PCs) in the electric power grid. The method, which is denoted the ideal phase-shifter (IPS) method, utilizes the concept of the power controller plane where the active power of the PC line is plotted versus the difference in voltage angle between the PC terminals. The power controller plane makes it possible to graphically visualize the working area of a PC in a power grid and thus determine the grid situations which are dimensioning for the PC. The IPS method offers the possibility of plotting the grid characteristics in the power controller plane which are unbiased with respect to the reactive properties of the PC. This makes the method suitable for comparison and preliminary design of PCs of different types and with different characteristics by simple geometrical considerations. In this process, the IPS method uses the power-flow control method for deriving the PC characteristics. This paper includes an application example of the method where it is used for dimensioning of two different PCs in a 26-bus test system. [ABSTRACT FROM AUTHOR]

The internal control of a modular multilevel converter aims to equalize and stabilize the submodule capacitor voltages independent of the loading conditions. It has been shown that a submodule selection mechanism, included in the modulator, can provide voltage sharing inside the converter arm. Several procedures for controlling the total stored energy in each converter arm exist. A new approach is described in this paper. It is based on estimation of the stored energy in the arms by combining the converter electromotive force reference, the measured alternating output current, and the known direct voltage. No feedback controllers are used. Experimental verification on a three-phase 10 kVA prototype is presented along with the description of the new procedure. [ABSTRACT FROM AUTHOR]

Voltage-source converters (VSC) have been widely utilized to provide instantaneous reactive power support to power systems, an application referred to as static synchronous compensator (StatCom). The integration of energy storage (ES) into a StatCom makes it possible for the StatCom to provide a certain amount of active power as well as reactive power support. The possible benefit of the additional active power of a StatCom can be power oscillation damping capability, mitigation of phase-jump-related disturbances, etc. Direct connection of an ES device to the dc link of the VSC incurs an unnecessarily high-voltage rating of the VSC due to the considerable voltage swing associated with the ES device. Dual thyristor converter topology has been proposed as the interface between the ES and the dc link of the VSC. In this paper, a cost estimation for systems with the proposed interface topology is presented regarding three types of ES: capacitors, supercapacitors, and batteries. The study shows potential cost savings with utilization of the proposed interface topology. In addition, a cost comparison between different types of ES is presented, providing a guideline for the choice of ES in these kinds of applications. [ABSTRACT FROM AUTHOR]

In this paper, voltage-source converter (VSC) based high-voltage dc (HVDC) transmission is investigated for interconnection of two very weak ac systems. By using the recently proposed power-synchronization control, the short-circuit capacities of the ac systems are no longer the limiting factors, but rather the load angles. For the analysis of the stability, the Jacobian transfer matrix concept has been introduced. The right-half plane (RHP) transmission zero of the ac Jacobian transfer matrix moves closer to the origin with larger load angles. The paper shows that, due to the bandwidth limitation imposed by the RHP zero on the direct-voltage control of the VSC, high dc-capacitance values are needed for such applications. In addition, the paper proposes a control structure particularly designed for weak-ac-system interconnections. As an example, it is shown that the proposed control structure enables a power transmission of 0.86 p.u. from a system with the short-circuit ratio (SCR) of 1.2 to a system with an SCR of 1.0. This should be compared to previous results for VSC based HVDC using vector current control. In this case, only 0.4 p.u. power transmission can be achieved for dc link where only one of the ac systems has an SCR of 1.0. [ABSTRACT FROM AUTHOR]

Voltage source converters (VSC) have been widely utilized to provide instantaneous reactive power support to power systems, an application referred to as static synchronous compensator (StatCom). Integration of energy storage (ES) into a StatCom makes it possible for the StatCom to provide a certain amount of active power as well as reactive power support. The possible benefit of the additional active power support of a StatCom can be power oscillation damping capability, mitigation of phase-jump related disturbances, etc. Direct connection of an ES device to the dc link of the VSC incurs unnecessarily high voltage rating of the VSC due to the considerable voltage swing associated with the ES device. In order to reduce the total cost, a dual thyristor converter topology has been proposed as the interface between the ES and the dc link of the VSC. In this paper, dynamics of the proposed system are investigated. Control strategies are proposed and verified by simulations with PSCAD/EMTDC. [ABSTRACT FROM AUTHOR]

The voltage at the point of common coupling (PCC) in a weak network is very sensitive to load changes. A sudden change in active load will cause both a phase jump and a magnitude fluctuation in the bus voltage (voltage at the PCC), whereas reactive load changes mainly affect the voltage magnitude. With the addition of energy storage to a static synchronous compensator (StatCom), it is possible to compensate for the active power change as well as providing reactive power support. In this paper effective active power compensation schemes are proposed. Simulation and experimental results verify the compensation schemes by showing that a StatCom with energy storage can significantly reduce phase jumps and magnitude deviations of the bus voltage under load disturbances. [ABSTRACT FROM AUTHOR]

A transformer might be driven into saturation by faults in the connected system. In a transmission system with a Static synchronous Compensator and transformers connected at the point of common coupling, different modulation schemes utilized by the voltage source converter influence the transformer saturation in different ways. This paper compares the saturation effect during fault recovery when two alternative modulation schemes are utilized: voltage modulation and flux modulation. The comparison shows that utilization of flux modulation scheme tends to soften the saturation problem during fault recovery. However, this is achieved at a higher converter transient peak current. [ABSTRACT FROM AUTHOR]