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The brightness of low-temperature polycrystalline silicon and metal-oxide (LTPO) active-matrix organic light-emitting diode (AMOLED) display under low-refresh-rate driving condition tends to increase during pixel voltage holding time of each frame even though there is no critical leakage current path from the storage capacitor. We have found that the main cause of the brightness increase is electron trapping into the gate insulator of driving thin-film transistor (DTFT) which operates in the saturation mode prone to hot carrier injection. We propose a novel driving method to suppress the brightness variation by applying a high voltage to the source and drain of the DTFT during the non-emitting time which is inserted periodically for dimming the organic light-emitting diode (OLED) display. Our experimental results show that the brightness variation can be reduced from 3.7 % to 1.4 % at the 63rd gray level by the proposed DTFT reset scheme.

This paper introduces novel driving methods of the pull-down unit in a gate driver circuit for enhancement- and depletion-mode a-IGZO thin-film transistors (TFTs). The proposed gate driver circuit can achieve uniform output characteristics and effectively reduce the VOUT ripple voltage because the threshold voltage (VTH) of the pull-down units is compensated regardless of the a-IGZO TFT operation characteristics (enhancement mode: positive value of VTH, depletion mode: negative value of VTH). Many groups proposed the VTH compensation method for pull-down TFTs in the gate driver circuit using a diode connection structure. However, the diode connection structure to extract the VTH value cannot be applied in the depletion-mode oxide TFTs because TFT enters the turn-on state even when the VGS value is 0 V. To solve this problem, we adopted the VTH extraction period only once in one frame time. As a result, our circuit can compensate for VTH of the pull-down unit in the enhancement mode and can be normally operated in the depletion mode. Adjunctively, two low signals (VGL1 and VGL2) and QC node were designed to prevent the leakage current path for Q and VOUT nodes. To verify the threshold voltage tolerance for various stress conditions, we demonstrated the reliability of the circuit according to the threshold voltage change of the TFTs. The simulation result shows that all the VOUT waveforms are maintained at +28 V (VGH) under the VTH shift conditions from -7 V to +11 V; further, the rising time and falling time are less than 0.62 μs and 0.96 μs, respectively. Based on a 120Hz ultra-high definition (UHD) graphics (3840×2160) display panel, the proposed circuit has uniform VOUT characteristics compared to previous VTH compensation circuit when ΔVTH changes from -3 V to +11 V. When ΔVTH changes from -4 V to -7 V, there is also no circuit malfunction, even with slight increase in the falling time and power consumption.

We propose a new gate driver circuit with an improved output pulse using depletion mode amorphous indium gallium zinc oxide thin film transistors. The previous reported gate driver circuit of our group has a weak point. It is that the peak voltage of the output pulse is decreased during the output pulse duration. A peak voltage drop of output pulse is larger by an increase the leakage current of the pull-down transistor as an increase of the threshold voltage (Vth) in the negative direction. Also, a power consumption is increase by that. In this paper, the new gate driver circuit is proposed to solve this weak point. The peak voltage drop of the output pulse of the new gate driver circuit is not occurred as an increase of the pull-down transistor Vth in the negative direction. The peak voltage of the output pulse of the previous reported circuit is 27.5 and 26.2 V at the transistor Vth of 0.5 and -2.9 V, respectively. However, the peak voltage of the output pulse of the new gate driver circuit is 27.8 and 27.6 V at the transistor Vth of 0.5 and -2.9 V, respectively.