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Schottky diodes were fabricated on the InP/InAlAs heterostructures where the thickness of the InP ranges from 0 to 7 nm. A Ne-based atomic layer etching technique was utilized for precise control of the thickness of the InP layer. After removing the part of the InP layer, Pt/Ti/Pt/Au multilayer metallization was evaporated to form a Schottky contact. Thermal annealing was then carried out to drive Pt into the device layer. The electrical characteristics of the Schottky diodes were analyzed to determine the effect of a thin InP layer on the performance of the Schottky diodes. Transmission electron microscopy (TEM) was also utilized to investigate the diffusion of the metal into the semiconductor heterostructures. The experimental results show that the 7-nm-thick Pt can pass through the 4-nm-thick InP layer and reach the InAlAs layer. A Schottky junction was effectively formed within InAlAs layer when the thickness of the InP layer was equal or less than 4 nm for the 7-nm-thick Pt bottom layer. [ABSTRACT FROM AUTHOR]

The characteristics of 0.15-μm InAlAs/InGaAs pseudomorphic high-electron mobility transistors (p-HEMTs) that were fabricated using the Ne-based atomic layer etching (ALET) technology and the Ar-based conventional reactive ion etching (RIE) technology were investigated. As compared with the RIE, the ALET used a much lower plasma energy and thus produced much lower plasma-induced damages to the surface and bulk of the In0.52Al0.48As barrier and showed a much higher etch selectivity (~70) of the InP spacer against the In0.52Al0.48As barrier. The 0.15-μm InAlAs/InGaAs p-HEMTs that were fabricated using the ALET exhibited improved GM,max (1.38 S/mm), ION/IOFF(1.1S x 104), drain-induced barrier lowering (80 mV/V), threshold voltage uniformity (Vth,avg = -190 mV and σ = 15 mV), and ƒT (233 GHz), mainly due to the extremely low plasma-induced damage in the Schottky gate area. [ABSTRACT FROM AUTHOR]