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Properties of InGaAs buried-channel quantum-well MOSFETs affected by the barrier and buffer layers are analyzed by numerical simulations to assist device engineering and optimization. The interplay between the charge-neutrality level position at the barrier/dielectric interface and conduction band discontinuity at the barrier/channel interface is shown to critically impact the achievement of an enhancement-mode device with full turn-on. A p-doped buffer is found to be a more suitable option than the standard unintentionally doped buffers to control short-channel effects. [ABSTRACT FROM AUTHOR]

Performance improvement of InGaAs buried channel metal-oxide-semiconductor field-effect-transistors (MOSFETs) has been achieved by inserting InAs layer and properly designing the inserted layer position. In0.7Ga0.3As and InAs channel buried channel MOSFETs were fabricated and analyzed including drive current, transconductance, effective mobility, and subthreshold swing. All InAs buried channel devices show good off-state and saturation property. By inserting InAs in the middle of InGaAs channel (InGaAs/InAs/InGaAs channel), 37% enhancement of high field effective channel mobility was achieved over devices with pure InGaAs channel. Devices with InAs inserted in the middle exhibits peak effective channel mobility around 6140 cm2/V s and subthreshold swing of 107 mV/dec. [ABSTRACT FROM AUTHOR]

We present InP metal-oxide-semiconductor capacitors (MOSCAPs) and metal-oxide-semiconductor field-effect transistors (MOSFETs) with stacked HfAlOx/HfO2 gate dielectric deposited by atomic layer deposition. Compared with single HfO2, the use of stacked HfAlOx/HfO2 results in better interface quality with InP substrate, as illustrated by smaller frequency dispersion and lower leakage current density. The equivalent oxide thickness of MOSCAPs with 10 Å HfAlOx/25 Å HfO2 stacked gate dielectric is 12 Å. The MOSFETs with this gate dielectric achieve two times higher transconductance than those with single 35 Å HfO2. They also exhibit drive current of 60 mA/mm and subthreshold swing of 83 mV/decade for 5 μm gate length. [ABSTRACT FROM AUTHOR]