1. A low power triple-mode parallel-processing CMOS receiver for BD-II/GPS/Galileo joint navigation applications
- Author
-
Liu Junhua, Zhang Xing, Liao Huailin, Wang Chuan, and Hou Zhongyuan
- Subjects
Frequency synthesizer ,Engineering ,Multi-mode optical fiber ,business.industry ,Bandwidth (signal processing) ,Electrical engineering ,Condensed Matter Physics ,GPS signals ,Noise figure ,Atomic and Molecular Physics, and Optics ,Electronic, Optical and Magnetic Materials ,Image response ,CMOS ,Electronic engineering ,Global Positioning System ,Electrical and Electronic Engineering ,business - Abstract
This article presents a low power triple-mode parallel-processing CMOS receiver for BD-II/GPS/Galileo joint navigation applications. An innovative image rejecting parallel-processing architecture is proposed, which utilizes a single frequency synthesizer, shares the front-end, and adopts two complex band-pass filters in two channels separately, aiming for the receiving of BD-II B1/GPS L1/GALILEO L1 multistandard navigation signals simultaneously. The proposed triple-mode parallel-processing receiver is fabricated in a 0.18 μm CMOS process with 22.2 mA power consumption under the triple-mode parallel-processing navigation. Measured results show that it has a maximum conversion gain of 101.5 dB and a double-side-band noise figure of 3.3 dB with the fixed IF of 7*f0 (f0 = 1.023 MHz), tunable IF bandwidth of 2*f0/4*f0, and more than 34 dB image rejection. © 2013 Wiley Periodicals, Inc. Microwave Opt Technol Lett 55:2616–2620, 2013
- Published
- 2013