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This paper presents an application of advanced first-order second-moment (AFOSM) reliability method to probabilistic design of integrated circuits with correlated parameters. The method avoids the transformation to the space of uncorrelated parameters and provides a conservative estimate of the yield. Optimal nominal values are found such that the cost of tolerances is minimized while the desired yield is achieved. Numerical results are presented for a switched capacitor filter and verified by Monte Carlo simulation.

To improve the simulation efficiency of switched circuits, it is advantageous to model their switching devices as short and open circuits. The disadvantage is that such models may cause inconsistent initial conditions (IIC), and Dirac impulses may appear. Conventional simulators do not handle such situations correctly. This paper introduces a new algorithm for analyzing circuits with IIC by a mixed numerical-symbolic method. The method detects the order of the Dirac impulse and also finds the correct initial conditions after switching. It is applicable to nonlinear circuits.

The authors have worked in computer-aided design (CAD) and in simulation of switched networks over many years. In this brief, they consider all CAD aspects related to simulation of these networks and present practical suggestions and methods useful for analysis in time and frequency domain.

This chapter provides simplified steps for the synthesis of inductor capacitor (LC) filters. Synthesis of electrical networks is an area of electrical engineering in which one attempts to find the network from given specifications. In most cases, this is applied to filters constructed with various elements. Filters are linear devices that allow the use of linear network theories. Specifications of filters are almost always given as frequency domain responses, which leads to the use of Laplace transform. Filters can be built with passive elements that do not need any power supply to retain their properties and with active elements that work only when electrical power is supplied from a battery or from a power supply. The chapter also discusses frequency domain responses, normalization, and scaling.

The theory for analysis of general periodically switched linear networks is described. It can be used for analysis and design of nonideal switched-capacitor circuits with linear imperfections such as switch resistances and finite gain-bandwidth products of operational amplifiers. In addition to frequency response, sensitivity of the response to changes in element values is determined. This is needed in evaluating the quality of circuit and in the design by optimization. The proposed theory computes the exact response without any theoretical approximation or restriction on circuit topology. The theories have been implemented in an interactive computer program called WATSNAP (Waterloo Switched Network Analysis Program). Several numerical examples are evaluated. >

The possibilities and problems of using PLL-/spl Sigma///spl Delta/ architecture to construct a RF to digital direct conversion receiver is investigated by taking different kinds of noises into consideration. The contribution of each noise in the receiver is analyzed by deriving the output response of the receiver in the z-domain and performing time-domain simulation. Some preliminary results are given.

The paper describes a program for fast simulation of nonlinear switched analog networks used in communications and power electronics. The switches act as open and short circuits and are used to model switching diodes, transistors or thyristors. At switching instants, the values from left and right are obtained, even in case of inconsistent initial conditions.

An algorithm for switch-level timing simulation of MOS logic networks is proposed. The event-driven simulator, WATSWITCH, partitions the circuit into subblocks which are solved by replacing each transistor by a special current-limited switch. Because of the choice of the switch model, time-domain responses are obtained without model evaluations during the simulation, without table lookup, and without time-domain integration. This is achieved by allowing only capacitors and piecewise-constant current sources to be the elements of the simulator. Because resistors are not allowed, the time responses are known to be piecewise-linear segments. As a consequence, neither numerical integration nor transistor model evaluation is needed during the simulation. >

Novel switched-capacitor transconductance elements that are free from resistive effects due to parasitic capacitances are used to realize the filters. The absence of resistive parasitics lowers the overall parasitic sensitivity of such filters. The remaining small deviations in the response can be overcome by simple predistortion. Computer simulation on a sixth-order bandpass filter is presented. >

The switched-capacitor transconductance is used to simulate a new FDNR element which is relatively insensitive to parasitic capacitances and requires few components. The element is used in the switched-capacitor simulation of a fifth-order LC low-pass filter. It is shown that the influence of other switched parasitic capacitances, occurring in the filter due to the switches, can be eliminated by predistortion and that the resulting network is, except for a flat loss, equivalent to the original ideal network. Computational and experimental results, obtained on a network with discrete components, are presented.

A new element, the switched-capacitor transconductance, is developed and used to construct several other active switched-capacitor building blocks: amplifiers with gain defined by the ratio of capacitors, integrators, inductors, and gyrators. The element is also used to design a switched-capacitor biquad. All reported networks were fabricated with discrete components and tested. Experimental data for the biquad are given.

The computational aspects of the analysis of switched-capacitor (SC) networks having ideal elements and an arbitrary number of phases are discussed. In each phase, a special two-graph preprocessing step eliminates all switches and topologically compresses the resulting matrices to the minimum. Subsequently, a new solution method reduces the problem to the solution of the compressed system. in a single phase. The majority of steps are transferred into preprocessing and done only once. A summary of various analyses, available in the WATSCAD program, is presented as well.

Switched-capacitor voltage gain elements, in which the gain is precisely controlled by the ratio of two capacitors, are presented. The voltage gain is obtained by means of a transconductance element operating into a switched-capacitor resistor. Circuit configurations use a single operational amplifier or a unity-gain buffer. In some of these configurations, the offset voltage of the operational amplifier or the buffer is not amplified.

A new switched-capacitor integrator with low sensitivity to finite amplifier gain is described. The circuit is simple, requiring very little extra chip area as compared to the uncompensated integrator. It is compared with previously proposed finite gain compensated switched-capacitor integrators.

A simple technique for significantly reducing the effect of the finite gain of amplifiers on the performance of switched-capacitor filters is presented. The effectiveness of this technique has been established by extensive simulation studies. This technique has the potential for simplifying amplifier design and extending the frequency range of switched-capacitor filters by trading gain for bandwidth.

A switched-capacitor second-order building block based on switched-capacitor transconductance is presented. All types of transfer functions, e.g. lowpass, bandpass, highpass, and bandstop are possible and experimental results are presented.

The switched-capacitor transconductance is used to simulate both grounded and floating inductors. Use of the elements is demonstrated on a switched-capacitor simulation of a 5th-order LC lowpass filter.

The use of switched capacitors to realise conductances in m.o.s. integrated circuits is well established. The objective here is to describe a technique for realising transconductance elements using switched-capacitors and unity-gain buffers. The application of these elements to the realisation of a gyrator is presented and experimental results are discussed.