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Flip chip packaging faces two primary bonding-process obstacles: flux use and geometry mismatch between die and substrate pad pitch. These obstacles motivated the development of a fluxless bonding method called solid-liquid interdiffusion bonding by compressive force (SLICF). SLICF utilizes a mechanical force to form the bond through solid-liquid interdiffusion with a joint-in-via (JIV) architecture for flip chip packaging. SLICF bonding (also known as thermo-mechanical (TM) bonding) forms an instantaneous bond and eliminates the need for reflow infrastructure. Both Au-PbSn and Au-SAC interconnect systems were studied for the SLICF bonding on the JIV architecture at a 130- mum pitch. The morphologies of Au-PbSn and Au-SAC in solid-liquid interdiffusion were studied with their kinetics measured by the Au consumption rate. The SLIFC bonds for Au-PbSn and Au-SAC were compared and assessed by mechanical shear tests and thermomechanical stresses. Au with PbSn was found to perform marginally better due to its joint geometry and slower kinetics.

FBGA package reliability is usually assessed through the conventional approaches of die attach and mold compound material optimization. However, with the rapid changes and fast-moving pace of electronic packaging and the introduction of new soldermask and core materials, substrate design has also become a critical factor in determining overall package reliability. The purpose of this paper is to understand the impact design and soldermask material of a rigid substrate on overall package reliability. Three different soldermask patterns with a matrix of different die attach, mold compound, and soldermask materials are assessed using the moisture sensitivity test (MST). Package reliability is also assessed through the use of temperature cycling (T/C) at conditions “B” and “C.” For material optimization, three different mold compounds and die attach materials are used. Material adhesion between different die attach materials and soldermask materials are obtained through die shear performed at various temperatures and preset moisture conditions. A study correlating the different packaging material properties and their relative adhesion strengths with overall package reliability in terms of both MST and T/C performance was performed. Soldermask design under the die pads was found to affect package reliability. For example, locating vias at the edge of the die is not desirable because the vias acts as initiation point for delamination and moisture-induced failure. Through die shear testing, soldermask B demonstrated higher adhesion properties compared to soldermask A across several packaging materials and enhanced the overall package reliability in terms of both MST and T/C performance. Both MST JEDEC level 1 and the T/C of “B” and “C” at 1000 cycles have been achieved through design and package material optimization.

A fluxless bonding technique has been developed as a method of flip-chip bonding for microelectronic packaging. The fluxless bonding technique can be achieved instantaneously in an ambient environment between metallic stud bumps and predefined molten solder. This paper describes the mechanics of the bonding action and verifies the effectiveness of this bonding method through wetting balance tests and scanning electron microscope and energy dispersive x-ray analysis. This technique has been demonstrated by using a gold stud bump to break the tin oxide layer over molten solder. This allows for a fast, solid liquid interdiffusion between gold (Au) and the fresh molten eutectic lead-tin (Pb–Sn) solder for joint formation during solidification. This bonding method has been successfully tested with 130-μm-pitch flip-chip bond pads on a joint-in-via flex substrate architecture.