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The increasing importance of cascaded multilevel converters (CMCs), and the sub-category of modular multilevel converters (MMCs), is illustrated by their wide use in high voltage DC connections and in static compensators. Research is being undertaken into the use of these complex pieces of hardware and software for a variety of grid support services, on top of fundamental frequency power injection, requiring improved control for non-traditional duties. To validate these results, small-scale laboratory hardware prototypes are often required. Such systems have been built by many research teams around the globe and are also increasingly commercially available. Few publications go into detail on the construction options for prototype CMCs, and there is a lack of information on both design considerations and lessons learned from the build process, which will hinder research and the best application of these important units. This paper reviews options, gives key examples from leading research teams, and summarizes knowledge gained in the development of test rigs to clarify design considerations when constructing laboratory-scale CMCs. Published version This work was supported in part by The University of Manchester supported by the National Innovation Allowance project ‘‘VSC-HVDC Model Validation and Improvement’’ and Dr. Heath’s iCASE Ph.D. studentship supported through Engineering and Physical Sciences Research Council (EPSRC) and National Grid, in part by the Imperial College London supported by EPSRC through the HubNet Extension under Grant EP/N030028/1, in part by an iCASE Ph.D. Studentship supported by EPSRC and EDF Energy and the CDT in Future Power Networks under Grant EP/L015471/1, in part by University of New South Wales (UNSW) supported by the Solar Flagships Program through the Education Infrastructure Fund (EIF), in part by the Australian Research Council through the Discovery Early Career Research Award under Grant DECRA–DE170100370, in part by the Basque Government through the project HVDC-LINK3 under Grant ELKARTEK KK-2017/00083, in part by the L2EP research group at the University of Lille supported by the French TSO (RTE), and in part by the Hauts-de-France region of France with the European Regional Development Fund under Grant FEDER 17007725.

Estimation-based indirect dc-voltage control in MMCs interacts with circulating current control methods. This paper proposes an estimation-based indirect dc-voltage control method for MMC-HVDC systems and analyzes its performance compared to alternative estimations. The interactions between estimation-based indirect dc-voltage control and circulating current control methods, active/reactive power regulation are also investigated. The proposed method delivers similar performance to measurement-based direct dc-voltage control, regardless of the circulating current control method. Steady-state and transient performance is demonstrated using a benchmark MMC-HVDC transmission system, implemented in a real-time digital simulator. The results verify the theoretical evaluations and illustrate the operation and performance of the proposed indirect dc-voltage control method.

The cascaded H-bridge (CHB) low-capacitance StatCom (LC-StatCom) has a limited operating area in the inductive region compared to a conventional StatCom's V–I characteristic. This limitation for operation in the inductive region is considered to be the biggest disadvantage of CHB LC-StatCom. In this paper, the effect of adding parallel and series reactors on the LC-StatCom system's V–I characteristic is analyzed. Then, a new configuration, which fully compensates for the lost operating area of the LC-StatCom, is introduced. A scaled down single-phase seven-level laboratory prototype is used to confirm practicability of the proposed system.

The maximum-allowable voltage/energy ripple and peak arm current define the operating limits of a modular multilevel converter (MMC). Furthermore, under unbalanced ac-grid conditions, the control targets of a power electronics converter with regards to balanced active power, reactive power or grid currents affect the power capabilities and operating region of the MMC. The objective of this paper is to investigate and quantify the operating region of an MMC under unbalanced ac-grid conditions and the impact of circulating current control and system control targets on the limits of the MMC operating region. It is demonstrated that higher order harmonic injection in the circulating current through a reference calculation based on instantaneous information extends the operating region of the MMC under grid imbalances, reducing capacitor voltage ripples compared to a direct elimination of the second order harmonic regardless of the converter control target. The efficacy of both circulating current control methods is validated through real-time digital simulations of an 800 MVA benchmark MMC-based high-voltage dc (MMC-HVDC) transmission system.

This paper introduces a modulation method for the stacked multicell converters (SMCs). The proposed method is implemented using phase-disposition pulse width modulation and is capable of balancing and regulating the voltages of all the capacitors in the topology, i.e., the flying capacitors and the dc-link capacitors. The proposed method is also able to eliminate the low-frequency voltage ripples that may appear in the neutral point (NP) of SMCs. In SMCs with two stacks, the NP voltage level can be generated by direct connection of the output to the dc-link NP, but also using two extra states available. This redundancy is used to regulate the NP voltage. Furthermore, since the proposed method can eliminate the low-frequency voltage ripples in the capacitors, the capacitances of all the capacitors of the SMCs can be reduced, while maintaining high quality of the output voltages and currents. This enables the use of film capacitors. Simulation and experimental results are presented from a three-phase five-level $2\times 2$ SMC to verify the effectiveness of the proposed method.

This paper presents a fault-tolerant configuration for the modular multilevel converter (MMC). The procedure is able to detect faults in voltage sensors and semiconductor switching devices, and it can reconfigure the system so that it can keep on operating. Both switch and sensor faults can be detected by comparing the output voltage of a set of submodules (SMs), which is measured by a so-called supervisory sensor, with two calculated reference voltages. Faults in the supervisory sensors are also considered. Sensor faults are overcome by using a measuring technique based on estimates that are periodically updated with the voltage measurements of the supervisory sensors. Additional SMs are included in the arms so that the MMC can bypass a faulty SM and continue operating without affecting the output voltage of the phase-leg. Experimental results obtained from a low-power MMC prototype are presented in order to demonstrate the effectiveness of the proposed techniques.

The paper presents a subislanding approach based on two algorithms, a backtracking algorithm, which is used to detect the exact location of distributed generation based on renewable energy sources (DGRESs) to establish subislands in the distribution networks and a protection co-ordination algorithm, which is used to identify the fault location. The IEEE reliability busbar test system is used for algorithm qualification, with several case studies and sensitivity analyses employed to verify the proposed algorithms. The probabilistic-based analytical technique along with the customer interruption cost model is then used to evaluate reliability improvements. The results presented in the paper indicate that the proposed approach is effective in increasing the reliability of power distribution systems with high penetration of DGRESs while providing an online reliability assessment.

This paper discusses the control of large-scale grid-connected photovoltaic power plant (GCPPP) operating under unbalanced grid voltages. The positive and negative sequences of the grid currents need to be controlled to regulate the power injected into the grid during unbalanced grid voltages. This paper shows that the use of conventional proportional-integral-based controllers compromises stability and dynamic performance of the inverter. The reason is the delays introduced by the filters needed to extract the sequences of the transformed grid currents. Because of such delays, there is a strong restriction on choosing the parameters for the current and voltage controllers, which forces the GCPPP to perform slowly. This can be improved by using resonant controllers instead, which avoid the need for filtering the transformed grid currents. Additionally, a new overcurrent protection is proposed for the GCPPP when it is providing grid voltage support during voltage sags. Simulation and experimental results are presented to evaluate and compare the performance of the GCPPP when operating with the different controllers.

This paper proposes and evaluates an active voltage-balancing method for stacked multicell converters (SMCs) using phase-shifted pulse width modulation. The method is easy to implement and can be applied to SMCs with any number of levels. The proposed method balances the voltages of the capacitors by modifying the duty cycle of each switch of the SMC using a proportional controller. The direction of the output current and the crossed effect among the duty cycles of the switches is considered and used to improve capacitor voltage balance. The performance of the proposed voltage-balancing method is verified experimentally for different loads, such as linear and nonlinear loads, and under transient conditions.

The large number of voltage levels in a modular multilevel converter (MMC) make staircase modulation a feasible alternative, particularly in high-power applications. However, staircase waveforms do not necessarily mean operation of the MMC submodules (SMs) at the fundamental frequency. This paper presents an analysis of SM switching frequencies in staircase-modulated MMCs and their correlation to the modulation index and load phase angle. A carrier-based pulsewidth-modulation (CB-PWM) equivalent technique is also developed. This analysis demonstrates that CB-PWM techniques provide a similar switching frequency with superior harmonic performance and improved voltage balancing characteristics at all modulation indices compared to staircase modulation. The theoretical analysis is verified with extensive simulation results for MMCs with different SMs and experimental results from a laboratory prototype.

Control of the circulating currents in a modular multilevel converter (MMC) is an integral part of its operation as the circulating currents have a significant impact on the rating of the power devices, losses and also capacitor voltage ripples. This study proposes two methods to control the circulating currents in the phase-legs of the MMC to their minimum dc value through elimination of the low-order harmonic components in the circulating current. The first method acts directly on the ac harmonics of the circulating current allowing the dc component to establish naturally, whereas the second one directlym controls the current to its dc reference. Simulations and experimental results from a laboratory prototype demonstrate the operating principles of the two methods and validate their performance.

Independent current control of each phase of a three-phase voltage source inverter under unbalanced voltage sags is proposed to effectively meet grid code requirements for grid-connected photovoltaic power plants (GCPPPs). Under current grid codes, GCPPPs should support grid voltages by injecting reactive currents during voltage sags. Such injection must not allow the grid voltages of the nonfaulty phases to exceed 110% of their nominal value. However, grid overvoltages can occur in the nonfaulty phases, especially if the currents injected into the grid by the GCPPP are balanced. Based on a new requirement of the European network of transmission system operators published in 2012, a transmission system operator is allowed to introduce a requirement for unbalanced current injection. In this letter, this grid code is addressed by controlling individual phases and injecting unbalanced currents into the grid during voltage sags. Experimental results from a 2.8-kV $\cdot$ A inverter are presented, confirming the effectiveness of the proposed control method.

This paper proposes a voltage balancing method for stacked multicell converters (SMCs) based on phase-disposition pulse-width modulation (PD-PWM). In order to reduce the switching transitions of the power devices, only optimal transitions between consecutive voltage levels are used. Selection of the optimal transition sequence is performed by evaluating a cost function. Significant reductions in the switching transitions and power losses of the power devices are achieved as compared to the optimal-state voltage balancing method where nonoptimal transitions are allowed. Simulation and experimental results from a seven-level $3\times 2$ SMC verifies that the proposed PD-PWM voltage balancing method is robust under linear/nonlinear loads and transients.

Grid-connected distributed generation sources interfaced with voltage source inverters (VSIs) need to be disconnected from the grid under: 1)excessive dc-link voltage; 2)excessive ac currents; and 3)loss of grid-voltage synchronization. In this paper, the control of single- and two-stage grid-connected VSIs in photovoltaic (PV) power plants is developed to address the issue of inverter disconnecting under various grid faults. Inverter control incorporates reactive power support in the case of voltage sags based on the grid codes (GCs) requirements to ride-through the faults and support the grid voltages. A case study of a 1-MW system simulated in MATLAB/Simulink software is used to illustrate the proposed control. Problems that may occur during grid faults along with associated remedies are discussed. The results presented illustrate the capability of the system to ride-through different types of grid faults.

This paper proposes a voltage balancing method for flying capacitor multilevel converters based on phase-disposition pulse width modulation (PD-PWM) using optimal transitions between converter switching states. The optimal transitions between converter switching states are possible due to the converter states’ redundancy and are decided with the continuous evaluation and minimization of a cost function. Simulation and experimental results verify the robustness of the proposed voltage balancing method against different load conditions. A significant reduction of the average switching frequency is achieved, when compared to the use of the optimal state voltage balancing method, where the optimal states are decided independently for each voltage level ignoring how transitions impact on the converter switching frequency. Moreover, the line-to-line output voltages are compared with the ones obtained with other modulation techniques in terms of total harmonic distortion values, and PD-PWM with the proposed voltage balancing method produces the best results.

This paper studies different circulating current references for the modular multilevel converter. The circulating current references are obtained from the instantaneous values of the output current and modulation signal of the phase leg. Therefore, the determination of the amplitude and phase of the output current is not needed, which is a significant improvement compared to other methods such as those based on injecting specific harmonics in the circulating currents. Among the different methods studied in this paper, a new method is introduced, which is able to reduce the capacitor voltage ripples compared to the other methods. A closed-loop control is also proposed which is able to track the circulating current references. With the discussed methods, the average values of the capacitor voltages are maintained at their reference while the voltage ripples are kept low. Experimental results are presented to demonstrate the effectiveness of the proposed and discussed methods.

This paper proposes a voltage balancing method for a flying capacitor multilevel converter based on the phase-disposition sinusoidal pulsewidth modulation (PD-SPWM). This voltage balancing method uses redundant switching states, which are determined by the minimization of a cost function. The implementation of the PD-SPWM using standard triangular carriers leads to additional switching events that are due to the transitions within the same voltage level, thus increasing the switching frequency of the power devices. Such drawback can be avoided by using sawtooth carrier waveforms. Another characteristic of the proposed voltage balancing method is that it does not require the tuning of parameters to achieve optimal performance. Simulation and experimental results confirm the robustness of the proposed method operating with different loads and transient conditions.

This letter proposes a phase-locked loop (PLL) able to operate as an independent single-phase PLL in the context of three-phase systems. Its key advantage is that the extracted information allows the independent control of both the active and reactive powers for each phase. The proposed PLL utilizes moving average filters and, hence, remains robust under unbalanced and highly distorted voltages. A frequency estimator is also presented and incorporated in the PLL angle detector path to make it frequency adaptive. The performance of the proposed PLL is verified experimentally and results for frequency change, phase-angle jump, and unbalanced voltage sag are reported as a confirmation of its potential. © 2014 IEEE.

In this paper a comparative loss analysis between a cascaded H-bridge (CHB) low-capacitance static compensator (LC-StatCom) with symmetrical I-V characteristics and a conventional CHB StatCom is presented. Effect of the capacitor voltage ripples on switching and conduction losses are determined through theoretical analysis. Simulation-based analyses on a 350-VA three-cell CHB LC-StatCom system are provided to confirm the theoretical predictions.

High-voltage direct current (HVDC) grids will require the development of dc protections that provide fast fault isolation and minimize the disturbance caused to the existing ac power networks. This paper investigates how the dc fault recovery performance of a half-bridge modular multilevel converter (HB-MMC) is impacted by different dc protection design choices. An HB-MMC point-to-point HVDC system that is protected with dc circuit breakers (CBs) is simulated on a real-time digital simulator using detailed switch models of the converters and switch gear. A dc CB controller has been developed and implemented in a software-in-the-loop fashion, and has been made available free for download. A novel blocking scheme for the HB-MMC is proposed, which limits the prospective dc-side fault current, benefiting dc switch gear. A comparison of circulating current controllers shows that the standard d — q controller is likely to be unsuitable for fault studies. Finally, benchmarking shows that a 48% reduction in power-flow recovery time and a 90% reduction in the energy dissipated in the circuit breaker can be achieved, along with other benefits, depending on the protection design.

This paper is focused on the control of a dc-dc bidirectional power converter for interfacing batteries in dc microgrids. A control design based on input/output feedback linearization technique is developed to perform as a voltage source operating in droop control mode. Contrary to the classical small-signal modeling, which is the most used for control design, the approach developed here allows to obtain a partial linearization large-signal model of the system equations. The linearization is performed by feedback some of the nonlinear terms. Simulation results are presented to evaluate the performance and robustness of the proposed control strategy.

This paper proposes a new method for measuring capacitor voltages in multilevel flying capacitor (FC) converters that requires only one voltage sensor per phase leg. Multiple dc voltage sensors traditionally used to measure the capacitor voltages are replaced with a single voltage sensor at the ac side of the phase leg. The proposed method is subsequently used to balance the capacitor voltages using only the measured ac voltage. The operation of the proposed measurement and balancing method is independent of the number of the converter levels. Experimental results presented for a five-level FC converter verify effective operation of the proposed method.

The negative-sequence current of a modular multilevel converter (MMC) under unbalanced ac grid conditions increases the voltage ripples of the submodule capacitors. This paper investigates the impact of circulating current control in capacitor voltage ripples under different unbalanced ac grid conditions, while considering multiple control objectives and independent control of active and reactive power. It is demonstrated that higher order harmonic injection in the circulating current through a reference calculation based on instantaneous information improves operation of the MMC reducing capacitor voltage ripples at the cost of increased peak arm current and dc current oscillations. The efficacy of the circulating current control is validated through real-time digital simulations of an 800 MVA benchmark MMC high-voltage direct current transmission system.

Distribution automation systems in terms of automatic and remote-controlled sectionalizing switches allows distribution utilities to implement flexible control of distribution networks, which is a successful strategy to enhance efficiency, reliability, and quality of service. The sectionalizing switches play a significant role in an automated distribution network, hence optimizing the allocation of switches can improve the quality of supply and reliability indices. This paper presents a mixed-integer nonlinear programming aiming to model the optimal placement of manual and automatic sectionalizing switches and protective devices in distribution networks. A value-based reliability optimization formulation is derived from the proposed model to take into consideration customer interruption cost and related costs of sectionalizing switches and protective devices. A probability distribution cost model is developed based on a cascade correlation neural network to have a more accurate reliability assessment. To ensure the effectiveness of the proposed formulation both technical and economic constraints are considered. Furthermore, introducing distributed generation into distribution networks is also considered subject to the island operation of DG units. The performance of the proposed approach is assessed and illustrated by studying on the bus 4 of the RBTS standard test system. The simulation results verify the capability and accuracy of the proposed approach.

Reliability worth analysis is of great importance in the area of distribution network planning and operation. The reliability worth's precision can be affected greatly by the customer interruption cost model used. The choice of the cost models can change system and load point reliability indices. In this study, a cascade correlation neural network is adopted to further develop two cost models comprising a probabilistic distribution model and an average or aggregate model. A contingency-based analytical technique is adopted to conduct the reliability worth analysis. Furthermore, the possible effects of adding distributed generation units into the network are evaluated. The proposed approach has been tested on a radial distribution test network evaluating the reliability worth. The results show that the probabilistic distribution model provides a more realistic model for the reliability analysis.

Connecting legs in parallel is a common way to increase the output current of a power converter. Interleaving the carriers used to modulate the reference signals for each leg leads to a reduction in the output current ripple without resorting to increasing the switching frequency. A whole set of shifted carriers is required if interleaved pulse-width modulators (PWMs) are used. Implementing this by means of a digital signal processor (DSP) means that the higher the number of carriers, the higher the number of DSP timing resources required. Provided that the latter are usually limited, this could be a drawback when increasing the number of interleaved carriers. This study presents the implementation of a PWM scheme where all modulators use the same carrier offering the same results as if a set of n interleaved carriers were used. Since the proposed algorithm takes maximum benefit from the PWM units available in a DSP, a higher number of legs connected in parallel can be controlled without adding any external processing hardware. A MATLAB/Simulink model has been set up for simulation purposes. Selected experimental results obtained from a three-leg single-phase inverter are reported, confirming the effectiveness of the proposed implementation.

Modulation techniques for the modular multilevel converter consider that the total number of sub-modules in the phase-leg is, either instantaneously or on average, equal to N balancing the capacitor voltages to a constant reference. This paper proposes an offset PWM technique that utilises the total number of the SMs in the arms of the MMC, particularly under low modulation indices. The result is a reduction in the average voltage of the capacitor and consequently, the total energy stored in the converter. The proposed technique is investigated under open and closed-loop circulating current control and simulation and experimental results are provided to illustrate the operation of the converter.

Multilevel cascaded converters for use in battery energy storage systems (BESSs) can utilise parallel-connected dc/dc conversion stages. These stages decouple each battery string voltage from the associated H-bridge capacitor voltage. Decoupling prevents second harmonic current ripple flowing in the batteries and compensates for variation in battery voltage due to state of charge. Instead of parallel-connected converters, this paper proposes use of series-connected fractionally-rated dc-dc conversion stages. Series-connected converters are shown to maintain the benefits of voltage decoupling but with significantly lower power ratings than their parallel-connected counterparts. Lower power ratings can facilitate a reduction in semiconductor losses and a lower cost for the BESS.

© 2016 IEEE. The superior harmonic performance of the modular multilevel converter facilitates reduction in passive filtering requirements. However, in practice, any volume and weight reduction brought about by using smaller filtering components, is offset by the increase in stored capacitor energy inside the converter. This paper proposes injection of high-frequency circulating currents and zero-sequence voltages, that significantly reduce capacitor voltage ripple. This can ultimately facilitate use of smaller capacitances. Optimal reference voltages and currents are designed off-line, with a model predictive control scheme used to track the references on-line while also compensating for any disturbances introduced by the practical system.

Permanent Magnet Synchronous Machines (PMSMs) have several advantages, such as high ef¿ciency and low volume and weight, which make them attractive for aerospace applications and high performance servo drives. Matrix Converters (MCs) are an all-silicon alternative, with no bulky reactive elements, to the standard voltage source inverter. The most common control technique for such PMSM MC-fed drives is the so-called Field-Oriented Control (FOC), which requires the permanent magnet ¿ux position to achieve high dynamic performance. Encoders or resolvers are the most common sensing devices used for such a purpose, which not only increases the total cost of the PMSM drive but also adds extra electronics and cabling that may cause failures. This paper investigates and proposes an all range (from zero to full) speed hybrid sensorless FOC. The novelty of this paper relies on the use of a hybrid sensorless four quadrant FOC that averages the needed angle estimation from a model based angle estimator and a voltage pulse test injection angle estimator when feeding the PMSM with an MC instead of a standard voltage source inverter. Speed reversal and load impact simulation results are included, fully supporting the claims made in this paper

Modular and cascaded multilevel converters provide a functional solution for the integration of energy storage systems (ESSs). This paper develops a hybrid multilevel converter based on the modular multilevel converter (MMC) that can be functionally extended with partial embedded ESS as a fraction of the overall converter power rating. The configuration, which can operate as a typical DC-AC converter, enables multi-directional power flow between the DC- and AC-side of the converter, as well as the embedded energy storage elements. The use of a three-phase flying-capacitor submodule eliminates the second-order harmonic oscillations present in modular cascaded multilevel converters. Current, voltage and power control are discussed in the paper while simulation results illustrate the operation of the hybrid MMC as a DC-AC converter in a typical inverter application and the additional functions and control of the embedded ESS. Published version

4 p. The full-row connection of dc-links provides an alternative configuration for the cascaded H-bridge (CHB) converter in large-scale grid-connected photovoltaic systems. In each stage, a single PV string is connected to all phases through isolated dc/dc converters. The per-phase power imbalance issue and second-harmonic voltage of the dc-link capacitors are alleviated by using this topology. This paper studies the low-voltage ride-through (LVRT) capability of the HB inverter with full-row connection in a grid-connected photovoltaic power plant (GCPVPP). A control algorithm is implemented for the isolated dc/dc converters which balances the capacitor voltages during voltage sags and reduces the second-harmonic voltage ripple of the dc-link capacitors. The performance of the grid-connected HB inverter with LVRT capability is investigated on a 3-MVA single-row, three-level CHB converter for the GCPVPP connected to a 6.6 kV grid. Accepted Version

Among the main control targets in a modular multilevel converter (MMC) is the control of the circulating currents within the phase legs of the topology. This paper presents a controller for the circulating current of the MMC that utilizes the available redundancies of the multilevel waveform in $2N+1$ modulated MMCs in order to regulate the circulating current to its reference. The main advantages of the approach are the elimination of control loops that generate the reference voltages for the control of the circulating current, simple implementation and very fast dynamic performance. The controller is implemented at the modulation stage and its operation is independent of the circulating current reference. An extension of the controller to track large deviations in the circulating current is also demonstrated. The simplicity and effectiveness of the proposed controller is illustrated through detailed simulations and experimental results from a single-phase laboratory prototype.

Multilevel cascade H-bridge (CHB) converters are increasingly applied for large-scale grid-connected photovoltaic power plants (GCPVPPs) because of their improved quality of output voltage waveforms, high efficiency due to the elimination of the line frequency transformer and modular structure. On the other hand, due to the high penetration of the installed distributed generation units in the power system, low-voltage ride-through (LVRT) capability and injection of reactive power during voltage sags are becoming necessary for large-scale GCPVPPs. This paper studies the LVRT capability of the grid-connected CHB inverter of a GCPVPP during various voltage sag conditions. Active/reactive power injection to the grid is also considered according to grid codes. The performance of the grid-connected seven-level CHB with LVRT capability is investigated on a 10-MVA GCPVPP, connected to the 6.6 kV medium-voltage grid simulation model during various voltage sag conditions. Accepted version

Due to the high penetration of the installed distributed generation units in the power system, the injection of reactive power is required for the medium-scale and large-scale grid-connected photovoltaic power plants (PVPPs). Because of the current limitation of the grid-connected inverter, the injected active power should be reduced during voltage sags. In order to obtain a constant dc-link voltage in a multi-string PVPP, the extracted power from PV strings should be equal to the injected power to the grid in all operating conditions (excluding power losses). Therefore, the extracted power of PV strings should be reduced during voltage sags. In this paper, an algorithm is proposed for determining the reference voltage of the PV string which results in a reduction of the output power to a certain amount. The proposed algorithm calculates the reference voltage for the dc/dc converter controller, based on the characteristics of the power-voltage curve of the PV string and therefore, no modification is required in the the controller of the dc/dc converter. Simulation results on a 50-kW PV string verified the effectiveness of the proposed algorithm in reducing the power from PV strings under different irradiation and reference power values. Accepted version

This chapter has introduced the main multilevel converter topologies, i.e. the DCC, the FC, and the CHB converters, as well as the MMC, which is a recent topology that is expected to be widely applied in HVDC transmission systems. After classifying the modulation techniques, the basics of SVM and CB-PWM for multilevel converters have been presented. In the case of SVM, a modulation algorithm prone to be implemented in a digital processor has been applied to the three-level DCC (or NPC converter) and described in detail. A capacitor voltage balancing strategy based on selecting proper redundant vectors has also been embedded in the modulation. In the case of implementing a CB-PWM, several carrier signals are required for multilevel converters. Different carrier dispositions have been shown, including PS-PWM and LS-PWM. CB-PWM is especially interesting for modular converter topologies, such as the CHB converter and the MMC.

Tolerance and component aging can cause significant differences in the capacitance values of the submodules (SMs) in a modular multilevel converter (MMC). Depending on the modulation technique, capacitance mismatches may produce uneven switching transitions of the SMs, hence imbalances in the power losses that can lead to reliability problems. In this paper, a new algorithm that helps to achieve evenly distributed switching and conduction losses within the converter SMs is presented. The proposed algorithm is based on a modification of the common voltage balancing algorithms, balancing a weighted function of voltage and losses. Even distribution of power losses is achieved at the cost of slightly increasing the capacitor voltage ripples. The effectiveness of the strategy has been demonstrated by simulation results of a high-power grid-connected MMC.

The increasing penetration of renewable energy sources (RES) poses a major challenge to the operation of the electricity grid owing to the intermittent nature of their power output. The ability of utility-scale battery energy storage systems (BESS) to provide grid support and smooth the output of RES in combination with their decrease in cost has fueled research interest in this technology over the last couple of years. Power electronics (PE) is the key enabling technology for connecting utility-scale BESS to the medium-voltage grid. PE ensure energy is delivered while complying with grid codes and dispatch orders. Simultaneously, the PE must regulate the operating point of the batteries, thus for instance preventing overcharge of batteries. This paper presents a comprehensive review of PE topologies for utility BESS that have been proposed either within industry or the academic literature. Moreover, a comparison of the presently most commercially viable topologies is conducted in terms of estimated power conversion efficiency and relative cost. Accepted version

Research on dc-fault tolerant multilevel converters has gained noticeable attention over recent years. The alternate arm converter (AAC) is one of such emerging multilevel converter topologies, and a hybrid topology of the two-level converter and the modular multilevel converter (MMC). Bipolar sub-modules (SMs) that can produce both positive and negative voltages are the building blocks of the AAC. This paper analyses the operation of an AAC with the full-bridge SM (FB-SM) and the cross-connected SM (CC-SM). The conduction and switching losses of the two SM configurations are evaluated and compared, in order to identify the suitability of CC-SM for AACs and its performance compared to the FB-SM. The CC-SM with identical semiconductor devices has reduced losses compared to the CC-SM with higher rated devices in the cross-connected path. It is concluded that the CC-SM does not offer advantages in the losses, construction, and application to the AAC, compared to FB-SM.

Due to high penetration of distributed generation units in power system, fault ride through (FRT) capability is one of the new requirements of the medium-scale grid-tied photovoltaic power plants (PVPPs). This paper proposes and investigates a control strategy for the neutral-point-clamped (NPC) inverter in order to inject proper unbalanced reactive currents to the grid during unbalanced grid faults. The proper unbalanced current injection reduces negative sequence of grid voltages and currents. The current references are scaled up/down individually, based on the grid phase rms voltages and inverter nominal current. The performance of the implemented control algorithm is investigated on a 150-kVA PVPP connected to 12.47-kV medium-voltage grid simulation model under various voltage sag conditions. Results from an experimental setup of grid-tied NPC inverter are presented in order to demonstrate the effectiveness of the proposed unbalanced current injection algorithm. ASTAR (Agency for Sci., Tech. and Research, S’pore) Accepted version

This paper presents a new technique for measuring the capacitor voltages in a modular multilevel converter using a reduced number of voltage sensors.With this technique, the minimum number of voltage sensors per arm is two. Each sensor measures the output voltage of a set of submodules (SMs) connected in series and acquires a new measurement when there is only one SM activated within the set. The acquired value corresponds to the capacitor voltage of the activated SM minus the voltage drops produced in the switches. A simple mathematical model is used to estimate all the SM capacitor voltages, and it is then updated whenever there is a newmeasurement available. An algorithm that enforces the periodic update of the voltage measurements is also presented. The proposed measuring technique highly reduces the number of voltage sensors; hence reducing the complexity and costs of the signal conditioning and data acquisition stages. Simulation and experimental results are presented to demonstrate the efficiency of the proposed technique. Ministerio de Economia y Competitividad de España (ENE2012-36871-C02-00), Unión Europea, Consolider-Ingenio Program (CD2009-00046)

This letter proposes a phase-shifted pulse-width modulation (PS-PWM) technique for the flying capacitor (FC) multilevel converter that improves the quality of the line-to-line voltages. In traditional PS-PWM, the line-to-line voltages include intervals that switch between nonadjacent voltage levels, which deteriorates the harmonic performance. The proposed PS-PWM constantly achieves line-to-line voltages with switching transitions between two adjacent levels. The proposed modulation technique is implemented using two sets of $n$ evenly phase-shifted carriers that are alternatively applied depending on the instantaneous value of the reference signal of each phase-leg. Furthermore, it can be implemented in FC multilevel converters with any number of levels while maintaining natural capacitor voltage balance. Experimental results from a four-level FC converter prototype are presented.

This paper proposes a stationary-frame sequence detector (SFSD) structure for determining the positive sequence in three-phase systems. The structure includes the use of the Clarke transformation and moving average filters (MAFs). The positive-sequence phase angle can be obtained from the alpha-beta components; however, such a detection becomes inaccurate if the grid voltages are unbalanced and/or distorted. The MAF is used to filter the nonideal components. Performance of the MAF is analyzed mathematically for a proper selection of the window width of the optimal filter in this application. The time delay introduced by MAFs is constant and known; hence, this may be compensated. The proposed detector structure allows fast detection of the grid voltage positive sequence (within one grid voltage cycle). The MAF completely eliminates any oscillation multiple of the frequency for which it is designed; thus, this algorithm can overcome the presence of imbalances or harmonics in the electrical grid. Furthermore, it includes a simple frequency estimator that makes the SFSD frequency adaptive and is capable of operating under large frequency changes. The entire SFSD is verified through simulation and experiment, showing very good performance even under several extreme grid voltage conditions.

This paper presents a new three-level topology based on the neutral-point (NP)-clamped converter. An additional leg is added to the basic topology. The main purpose of this leg is to provide the converter with fault-tolerant capabilities. In addition, during normal operation mode, the fourth leg can be used to balance the NP voltage. In this way, the low-frequency voltage oscillations that appear in the NP under some operating conditions are cancelled out effectively. As a result, the modulation strategy of the three main legs of the converter does not have to take care of the voltage balance and can focus on other aspects such as, for instance, minimizing the switching losses of the converter. However, the inclusion of the fourth leg produces some additional losses. A resonant topology is proposed to minimize the switching losses of this leg. Three different fault-tolerant solutions based on the fourth-leg topology are presented. A comparison of these topologies showing their respective advantages and drawbacks is made. Experimental results are presented to show the viability of this approach.

Grid-connected high-power inverters are often used in distributed generation and power quality systems. Those inverters have to handle high currents in order to achieve high power values without resorting to higher voltages. Connecting inverter legs in parallel is a proper way to achieve such high currents. Such parallel connection is made by means of inductors and achieving balanced currents among the legs becomes a critical issue. Circulating currents may produce additional losses and stress to the converter’s power devices. Therefore, they should be controlled and minimized. An efficient technique to achieve such balance is presented in this paper. The proposed strategy has been developed on a gridconnected three-phase system. Each phase of the inverter is made up of three legs in parallel. Besides, the control implemented in this work allows full regulation of the power factor. This way, any desired power factor value can be achieved in order to meet grid-connection requirements. Simulation and experimental results are shown in this paper.

This paper proposes a filtered-sequence phase-locked loop (FSPLL) structure for detection of the positive sequence in three-phase systems. The structure includes the use of the Park transformation and moving average filters (MAF). Performance of the MAF is mathematically analyzed and represented in Bode diagrams. The analysis allows a proper selection of the window width of the optimal filter for its application in the dq transformed variables. The proposed detector structure allows fast detection of the grid voltage positive sequence (within one grid voltage cycle). The MAF eliminates completely any oscillation multiple of the frequency for which it is designed; thus, this algorithm is not affected by the presence of imbalances or harmonics in the electrical grid. Furthermore, the PLL includes a simple-frequency detector that makes frequency adaptive the frequency depending blocks. This guarantees the proper operation of the FSPLL under large frequency changes. The performance of the entire PLL-based detector is verified through simulation and experiment. It shows very

This paper presents a study of the fault tolerance capacity of a neutral-point-clamped converter. Different faults in power semiconductors are considered, and the available postfault states of the converter are shown. In regard of the operation limits, two possible solutions are presented. In these solutions, adding a reduced number of additional components, the behavior of the converter when a switch fails improves considerably. Furthermore, an analysis of the neutral-point voltage balancing conditions after a fault and reconfiguration of the system is also evaluated. Experimental results that prove the correct operation of the proposed topologies are shown.

A space vector modulation (SVM)-based switching strategy for a five-level diode-clamped converter that is adapted as a static compensator (STATCOM) is presented. The main feature of the proposed SVM switching strategy is that it enables voltage-balancing of the DC capacitors, under steady-state and transient conditions, with no requirements for additional control actions or auxiliary devices. A dynamic model of the five-level STATCOM for power system studies is also developed. On the basis of the developed model, a voltage controller to regulate the DC-side voltage and a decoupled current controller to control the AC-side real and reactive power are designed. Performance of the STATCOM and the corresponding controllers are evaluated on the basis of digital time-domain simulation studies in the PSCAD/EMTDC environment. The studies demonstrate capabilities of the proposed space vector modulation (SVM) strategy to maintain voltage balance of the DC capacitors and control the STATCOM reactive power exchange for various operating conditions.

The DC-capacitor voltage drift is the main technical drawback of a multilevel diode-clamped converter (DCC) system. This paper proposes a space vector modulation (SVM)-based switching strategy that takes advantage of the redundant switching states of the SVM to counteract the voltage drift phenomenon of a five-level DCC-based back-to-back high-voltage direct-current (HVDC) converter system. The proposed strategy is based on online minimization of a quadratic cost function, associated with the voltage deviations of the dc capacitors. The salient feature of the proposed strategy is that it enables voltage balancing of the DC capacitors with no requirements for offline calculations, additional controls, or auxiliary power circuitry. Performance of the proposed SVM-based balancing strategy for a back-to-back HVDC converter system, based on time-domain simulation studies in the PSCAD/EMTDC environment, is evaluated and experimentally verified. The studies demonstrate capability of the proposed SVM strategy to control and maintain voltage balance of DC capacitors.

This paper presents an optimal voltage-balancing compensator for a specific modulation technique applied to a neutral-point-clamped converter. The technique uses two modulation signals per phase, and it is called double-signal pulsewidth modulation. It completely eliminates low-frequency oscillations in the neutral-point voltage. However, it does not provide natural voltage balancing; therefore, a compensation loop is required. The proposed control generates a feedback compensation signal that correctly modifies the three-phase modulation signals. The optimal compensation signal is calculated by a dynamic limiter according to the intrinsic limitations of the system related to the variability range of the modulation signals. It significantly improves the voltage balancing under all operating conditions of the converter. In addition, this compensation strategy does not increase the switching frequencies of the power devices. The algorithm is tested and verified using both simulation and experimentation.