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The design and measurements of a fabricated novel digitally programmable wideband power amplifier (PA) are presented. The PA is made suitable for use in all communication standards, including GSM, 3G, LTE and Femto-cells, offering a bandwidth of several octaves covering presently 300 MHz to 3.5 GHz. It meets power, efficiency and linearity specifications. The amplifier showed excellent performances. The uniquely linear and high power SONY GaAs J-PHEMT process along with novel output-stage multiple cascode topology structure are discussed. This enabled a distinctive larger output impedance and power and low voltage operation. The output stage offered 15–20 dB of gain without a driver. The circuit requires only little output or input matching for gain or impedance, depending on the application. In order to obtain higher gain and optimal application specific performance, a driver stage was added on the same die. A digitally programmable tuning chip was incorporated to the solution to optimize the performance for large bandwidths exceeding 40%. For smaller bandwidths no digital tuning was required. Digital pre-distortion algorithm was tested for better linearization. To the best knowledge of the authors, this is the first comprehensive plug-and-play solution for multi-band and multi-mode handset transmitters with the single chip one PA.

Increased network capacity and transmission speed has driven the development of many different wireless standards. Radio Frequency (RF) Technology has also been improving with the changing wireless standards. Such developments demand high linearity and power added efficiency from the RF Power Amplifier (RFPA). 5th Generation wireless standard (5G) is the next generation standard for mobile telecommunications. In this paper we consider a waveform obtained using Filter Bank Multi-carrier (FBMC) modulation, one of possible candidates for 5G, and investigate its impact with respect to RFPA behavioural modelling parameters. The measurement has been carried out using 30 MHz to 2000 MHz, 25 W GaN wideband power amplifier. Measurement has also been performed in the presence Orthogonal Frequency Division Multiplexing (OFDM) RF signals at the input of the power amplifier. And the result is analysed in terms of crest factor, non-linear order, memory depth and Adjacent Channel Leakage Ratio (ACLR) improvement.

This paper reports a new measurement method for wideband radiofrequency power amplifier characterization and digital predistortion. The proposed measurement procedure relaxes significantly the sampling rate requirement on the analog to digital converters of the feedback path. Successful PA linearizations were achieved in the presence of 20 MHz, 40 MHz, and 60 MHz LTE-A signals using a vector signal analyzer with sampling speeds equal to only 24 Msps, 40.96 Msps, and 61.44 Msps, respectively. Despite these very low sampling rates, a quasi perfect cancellation of the PA distortions was achieved (more than 50 dBc in terms of ACLR), in all tests, over bandwidths including up to fifth order intermodulation distortions. Such correction bandwidth is much wider than the observation bandwidths associated with the receiver sampling rates.

A methodology for the design of multichannel, wideband, highly efficient hybrid Class-J power amplifiers for fourth-generation (4G) communication transmitters is proposed. The design procedure is based on the automatic generation and evaluation of a vast number of output matching networks of the same topology but different dimensions, with respect to efficiency, output power, and linearity. The approach can find application in the management of the efficiency/linearity/bandwidth tradeoff in amplifier design. In this paper, two matching network architectures have been considered. One multistubbed network and a stepped-impedance microstrip line network. The approach has been validated through the design, simulation, and measurement of two power amplifiers realized using the aforementioned procedure. The first amplifier covers 1.6-2.2 GHz (31.6% fractional bandwidth) with 55%-68% drain efficiency at the 2-dB compression point and worst case adjacent channel power ratio (ACRP) and error vector magnitude (EVM) of - 21.8 dBc and 8.35%, respectively, over the bandwidth. The second covers 0.5-1.8 GHz (113% fractional bandwidth) with 50%-69% drain efficiency at the 2-dB compression point and worst case ACRP of - 27.5 dBc and EVM of 4.22%. Both amplifiers are based on a commercial, packaged 10-W GaN HEMT transistor.

Mathematical analysis of Doherty amplifiers have assumed many simplifications. Most notably, the peaking amplifier does not contribute power into the load and the peaking stage has an observed impedance of infinity. This paper will show that these simplifications impair the performance of a single-input Doherty amplifier and that phase tuning for compensation is needed to improve the overall system performance. The dual-input Doherty amplifier is capable of overcoming the limitations of power-dependent phase imbalance and phase compensation lines at the input of the peaking stage; however, the characterization of such an architecture is not straightforward. A new measurement technique is proposed to measure dc current, dc voltage, and output power levels to allow unique characterization of a dual-input Doherty amplifier. Phase compensation lines at the input of the peaking amplifier will be shown to be not required, as long as correct offset lines are calculated for both the carrier and peaking stage and that the λ/4 transmission-line length is not necessarily required for active load-pull. Results of a dual-input inverse load modulated Doherty amplifier are presented where the peaking stage delivers 10 dB less of maximum output power than the carrier, while still maintaining Doherty behavior. The peaking stage can therefore be implemented with a smaller device than the carrier.

An original source- and load-pull topology based on a passive technique is presented in this paper. The proposed system consists of passive tuners and loop structures. The use of a passive loop structure in cascade with a passive tuner allows for synthesis of reflection coefficients in the order of 0.97 magnitudes at the device under test's access plane. The measurement and characterization results of a 1W GaAs MESFET device show an improvement of 0.9 dB in the gain and 6% in the power-added efficiency when the proposed impedance synthesis techniques are used.

Highly efficient multiband power amplifiers (PAs) are key elements for the development of future multistandard multiband communication terminals and cognitive radios. This paper reports the design of a multiharmonic dual-band Class-F power amplifier for applications at wireless communication frequencies based on a switchless multiharmonic multiband load coupling network topology. The proposed output network topology is able to precisely synthesize Class-F impedance conditions with up to three harmonics at two distinct nonharmonic frequencies without the need of switches or electronically tunable elements. The proposed topology was used to design a Class-F PA in hybrid technology for the frequency bands at 1.7 and 2.14 GHz. Optimum impedances for maximum efficiency of the used GaAs MESFET for the two bands were determined by multiharmonic load-pull measurements and synthesized by the proposed switchless dual-band Class-F network. With a dual-band input matching network, the fabricated PA achieves 44.0% and 61.3% drain efficiency for an output power of more than 32.8 dbm and 34.4 dbm at 1.7 and 2.14 GHz, respectively. To the best knowledge of the authors, this is the first concurrent multiharmonic dual-band PA reported in open literature.

In [1] a new formulation for quantifying the linearizing baseband voltage signal, injected at the output bias port, to linearize a device behaviour was introduced. A key feature of this approach is that since it is formulated in the envelope domain the number of linearization coefficient required is independent of the envelope shape, complexity. This property is validated by performing baseband linearization investigations on a 10W Cree GaN HEMT device. Modulated signals with increasing complexity 3, 5, and 9-tone modulated stimulus, at 1.5dB of compression, were utilized. In all cases just two-linearization coefficients needed to be determined in order to compute the output baseband signal envelope necessary. Intermodulation distortion was reduced to around -50dBc, a value very close to the dynamic range limit of the measurement system.

Linearizing power amplifiers (PA) using digital pre-distortion (DPD) results in the use of a pre-distorted driving input signal that exhibits higher peak-to-average power ratio (PAPR). This results in a decrease in the PA efficiency which is dependent on the level of output power back-off required. This work proposes a new linearization architecture based on a new “post-distortion” method for power amplifier (PA) nonlinearity compensation. The proposed architecture allows for PA linearization with optimal input signal drive level to avoid efficiency degradation. A pseudomorphic high electron-mobility transistor (pHEMT) dual input PA architecture is also introduced and shown to be suitable for the proposed linearization approach. In comparison to classic pre-distortion techniques, the proposed post-distortion improves the output power by 2 dB and the drain efficiency by 9% in the presence of a 20MHz LTE up-link signal.

Baseband injection is a technique that can provide a cost-effective linearizing solution that can be combined with supply modulation techniques such as envelope tracking (ET), to minimize AM/AM distortion and potentially simplify the DSP linearization requirement and associated cost. Recently [8], a new approach for computing the baseband injection stimulus, formulated in the envelope domain, was introduced. The concept was originally demonstrated using a 10W Cree GaN-on-SiC HFET device. In this work its robustness with respect to alternative device technology is investigated using 25W Nitronex NPTB00025 GaN-on-SiC HEMT depletion-mode and a 10W, high-voltage LD-MOS, enhancement-mode devices. Its effectiveness in dealing with AM/AM distortion is confirmed.

The theory of inverse Doherty has been introduced. An experimental optimization technique has verified that the current requirement for inverse load modulation is less than classical load modulation in three different implementations where the peak is smaller than the carrier. The drain efficiency performance of inverse Doherty outperforms most recently published Doherty publications at large output power back-off levels. The 2.05GHz configuration achieves 48%, 33% and 17% at 10, 15 and 20dB output power back-off. The efficiency results can be improved by designing a dedicated inverse Doherty PA.

This paper demonstrates how the linearity performance of a 10W GaN HEMT can be dramatically improved by actively engineering the baseband impedance environment around the device. An important refinement to existing active load-pull measurement capability is proposed that allows the precise and independent control of all significant baseband and RF components that result from the amplification of a complex 9-carrier multi-sine modulation. The synthesis of constant, modulation frequency independent negative baseband impedances, resulting in specific baseband voltage waveforms has delivered a 24dB improvement in ACPR compared to the classical baseband short case, even when the device is operating with RF components terminated into a non-optimal 50Ω RF environment. This linearization concept is further investigated through the broadband emulation of a class-J impedance environment around a single device. Using this enhanced system and a two-tone modulated excitation, optimum baseband loads are identified that result in a 18.5dB and 24dB improvement in IM 3 and IM 5 inter-modulation products respectively, again relative to the case of a traditional IF short circuit. The significance of this last observation is that unlike the 50Ω case, the optimum class-J IM 3 and IM 5 baseband impedances disperse, becoming reactive and moving away from the real axis.

In this paper, an original high directivity directional coupler is presented. The proposed structure consists of a dual-directional coupler connected at its coupled terminations to a feed-forward compensation circuit. The compensation circuit is used to increase the coupler isolation factor of the obtained directional coupler. The directivity of a commercial dual-directional coupler has been improved by 40 dB using the proposed method.

In this paper, different techniques are combined in a unique characterization system dedicated for power transistor linearity improvement. Successive optimizations are performed using source-pull/load-pull techniques at the fundamental and base-band frequencies associated with an instantaneous memoryless base-band predistortion procedure. Measurement results performed at 1.575 GHz on a MESFET power transistor biased in class AB for a QPSK modulated signal, show that fundamental frequency source-pull measurements lead to an ACPR variation equal to 3 dB. Moreover, the influence of base-band impedance on ACPR and EVM is found to be 15 dB and 4.5 points, respectively. Finally, instantaneous memoryless base-band predistortion improves ACPR and EVM values by 5 dB and 1 point, respectively.

An absolute de-embedding technique for simultaneous impedance and power measurements suitable for on-wafer load-pull measurements of microwave transistors is proposed. This technique allows for the performance of a two-port power calibration of a vector network analyzer directly from the embedded reflection coefficient measurements. This method requires two sets of calibration standards, - one coaxial and one coplanar. Each set is comprised of three loads. An absolute power calibration performed at the coaxial reference planes using a reference power meter is also required for power measurement purposes at the coplanar reference planes of the microwave probes.

An original measurement system for nonlinear RF power amplifier characterization is presented. This new setup enables AM-AM and AM-PM measurements using one six-port reflectometer as a traveling wave ratio calculator. Experimental results of a commercial power amplifier at 2 GHz are presented and compared to those performed using a vector network analyzer.

In this paper, a high efficiency GaN based power amplifier is designed using multi-harmonics load pull measurements. A load matching network that independently controls the load impedance at the fundamental, second and third harmonic frequencies is used for straightforward implementation. The continuously driven single-ended deep class AB biased power amplifier achieves a peak power added efficiency of 68% at saturation. It is found that the designed power amplifier exhibit highly non linear characteristics with 7 dB gain compression at saturation. Digital predistortion based linearizer is used to improve the linearity performance of the power amplifier under a WCDMA excitation (PAPR=9.8 dB). At a 10 dB output power back-off, 21% power added efficiency was measured along with 53 dBc adjacent channel leakage ratio.

This paper reports an innovative source and load-pull measurement system suitable for power transistor characterization using complex modulated signals. The main originality of the proposed system is the use of active branches driven by a single RF and baseband coherent multi-harmonic vector signal generator. One broadband six-port reflectometer is used as a homodyne vector network analyzer to measure the impedances at the fundamental and harmonic frequencies at the device under test output terminal. To demonstrate the capabilities of the measurement system, source-pull and load-pull measurements are performed on a medium power FET to optimize its efficiency.

A dedicated inverse Doherty amplifier is presented in this paper using commercially available 10W GaN HEMT devices. Results show that an emulated 1W peaking amplifier and a 10W carrier amplifier can be used to create a highly efficient amplification architecture. Ideal inverse active load-pull is introduced theoretically with experimental results showing good agreement with the theory. A generic characterization scan of the inverse Doherty amplifier yields state of the art drain and power added efficiency in the output power back-off. A drain and power added efficiency of 60% and 50% are obtained at 10dB output power back-off respectively with a maximum output power of 41dBm at 2.1GHz.