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Fault current-limiting dynamic voltage restorers (FCL-DVRs), also named as dual-functional DVRs, involving both the FCL and the voltage compensation (VC) function, have attracted more attention. However, in case of the FCL-DVR operating in VC mode, either the high capacity of storage system in the dc-link or the oversizing of power converter is needed, and in case of the FCL-DVR operating in FCL mode both the high dc-link voltage and the oversizing of power converter are needed. Thus, in order to overcome these drawbacks, an improved FCL-DVR, which consists of an LC filter coupled with series coupling capacitor (LCC) at the ac side, is proposed in this article. The improved FCL-DVR using energy-optimized control strategy can not only perform the dual functions well, but also achieve the capacity optimization of FCL-DVR key components. The operating principle and performance of the proposed FCL-DVR under FCL and VC mode are elaborated, respectively. The optimal design of LCC and selection of FCL branch are studied in detail to ensure high stability and reliability for the proposed FCL-DVR operating in both modes. The simulation and experimental results clearly validate the effectiveness of the proposed topology and method. [ABSTRACT FROM AUTHOR]

• By the characteristic analysis of VSG, the causes and influencing factors of TPAI and FOC are revealed, and the inherent relationship between TPAI and FOC is found. • Based on the phase portrait theory, the stability analysis of different influencing factors is carried out. It is found that the proposed method can significantly enhance the TPAS of VSG under serious grid faults. • According to the verification results, the proposed method can simultaneously realize the TPAS and FCS of VSG during the fault, and the virtual inductance based on QSA can effectively suppress IIC. In addition, this method has the advantages of simple operation, no need to freeze the reactive power loop, and strong adaptability to engineering application problems such as considering the change of fault impedance and the difficulty of grid fault voltage measurement. When a serious grid fault occurs, a virtual synchronous generator (VSG) tends to lose transient power angle stability (TPAS) and cause the fault current to exceed the limit. Most existing research usually neglects the inherent relationship between transient power angle instability (TPAI) and fault over-current (FOC), which leads to the two problems being solved separately rather than simultaneously. In this paper, the transient power angle and fault current characteristics of VSG are first studied, and the causes and influencing factors of TPAI and FOC are explored. Then, the TPAS analysis is carried out based on the phase portrait theory. A TPAS control method for VSG considering fault current suppression (FCS) is proposed. This method is fulfilled by the combined regulation of active power reference and reactive voltage regulation coefficient, in which the reference and coefficient can be adjusted adaptively according to different fault degrees and application scenarios. In addition, a quasi-static approximate (QSA)virtual inductance is introduced to limit the instantaneous inrush current (IIC). The proposed method achieves both the TPAS and FCS at the same time during the fault. Finally, simulations and experiments verify the correctness of the theoretical analysis and the proposed method. [ABSTRACT FROM AUTHOR]

This paper proposes a dual-function dynamic voltage restorer (DFDVR) with fault current-limiting capability. The new topology can operate under different modes: the short-circuit fault current-limiting mode and the compensation mode for voltage fluctuation. Different functions of the DFDVR are achieved by controlling a brake chopper circuit and antiparallel thyristors. During fault conditions, the antiparallel thyristors are deactivated to protect the dc-side capacitor, and the duration of the on- and off-periods of the semiconductor switch in the brake chopper circuit is controlled to adjust fault current amplitudes. During voltage sags, the antiparallel thyristors are activated, and the brake chopper circuit is turned off by controlling the gate turn-off thyristor in the brake chopper circuit, thus making the DFDVR similar to a conventional DVR. The control scheme and optimal parameter selection of the DFDVR are provided. The design methodology of the DFDVR was verified through simulations performed using the PSCAD/EMTDC software. The experimental results prove the capability and effectiveness of the DFDVR topology. [ABSTRACT FROM AUTHOR]

This paper proposes a combinational voltage booster technique for fault ride-through (FRT) capability enhancement of squirrel-cage induction generators (SCIGs) by a multifunctional series compensator (MFSC). This technique uses a couple of antiparallel thyristors across the ac terminals of a traditional dynamic voltage restorer (DVR). Two control schemes are applied: a DVR mode and a multifunctional mode. The MFSC can operate in the DVR mode to compensate the slight voltage fluctuations/imbalances at the point of common coupling (PCC). Also, when serious voltage sags occur in the line, the MFSC controller deactivates the faulty phase inverter and activates its corresponding thyristors to insert the equivalent impedance to maintain the voltage level during the fault. Then, it switches to DVR mode to improve the recovery time after the fault. An operational algorithm is applied to deal with different voltage sag depths caused by various fault conditions (both symmetrical and asymmetrical faults). Comprehensive simulations were carried out by using PSCAD/EMTDC software, and results show that the proposed technology is a very effective device to improve the FRT capability of the SCIG. A scaled-down experimental verification was carried out. Experimental results confirm the effectiveness of the combinational voltage booster technique of the MFSC for both slight and serious voltage sags. [ABSTRACT FROM AUTHOR]

This paper presents a new multilevel cascaded-type dynamic voltage restorer (MCDVR) with a fault current-limiting function. This topology can operate in two operational modes: 1) a compensation mode for voltage fluctuations and unbalances and 2) short-circuit current-limiting mode. The current-limiting function of the MCDVR is performed by activating antiparallel thyristors during the short-circuit fault, and deactivating them during normal operation. The mathematical model of the MCDVR system is also established in this paper. The control scheme design and optimal parameter selection are outlined based on the detailed theoretical analysis of the converter. The transient states of the MCDVR in the compensation mode and current-limiting mode are also analyzed. Simulation results based on the PSCAD/EMTDC software, and experimental results on a laboratory setup help to validate the proposed topology and the theoretical analysis. [ABSTRACT FROM AUTHOR]

This paper proposes a new fault current limiting dynamic voltage restorer (FCL-DVR) concept. The new topology uses a crowbar bidirectional thyristor switch across the output terminals of a conventional back-to-back DVR. In the event of a load short, the DVR controller will deactivate the faulty phase of the DVR and activate its crowbar thyristor to insert the DVR filter reactor into the grid to limit the fault current. A fault condition is detected by sensing the load current and its rate of change. The FCL-DVR will operate with different protection strategies under different fault conditions. Design of the FCL-DVR involves selecting important parameters, such as DVR power rating, dc link voltage of the DVR, output filter reactors and capacitors, and grid-tied transformers is proposed. The design methodology of the proposed FCL-DVR is fully discussed based on power systems computer aided design (PSCAD)/electromagnetic transients including dc (EMTDC) simulation. A scaled-down experimental verification is also carried out. Both modeling and experimental results confirm the effectiveness of the new FCL-DVR concept for performing both voltage compensation and fault current limiting functions. [ABSTRACT FROM PUBLISHER]

Improving the operational reliability of distribution networks is an important goal in many countries and regions. The increase in the total length of feeders and the proportion of cable lines creates a larger single-phase-to-ground fault current, which makes the grounding arc difficult to self-extinguish, and then it may easily cause permanent fault events in the distribution network. The ground fault regulation device, also known as an arc-suppression device, is regarded as an important piece of equipment for the reliable and safe operation of ineffective grounding distribution networks. However, owing to the extensive access of cable lines and power electronic devices in the distribution network, the proportion of harmonic and active power contents in the ground fault current has increased, resulting in higher requirements for arc-suppression device performance. Based on the aforementioned, this study systematically summarizes the research work regarding arc-suppression devices from three aspects, namely, the topology of the arc-suppression device with its evolution trend, the control strategy of the arc-suppression device with its optimization method, and the functional integration method of the arc-suppression and electrical power regulation devices. Furthermore, the most representative topologies and control methods in each category are thoroughly described and briefly compared. The main challenges and critical problems of arc-suppression devices in the new distribution network are analyzed and summarized. [Display omitted] • The present situation of the topologies and control methods for the arc suppression devices is systematically studied. • The active and passive hybrid arc suppression devices can effectively integrate the high performance and low cost. • The functional integration of arc suppression and power control is the future development trend of arc suppression device. [ABSTRACT FROM AUTHOR]

• MF-ASD can realize reactive power compensation and arc suppression. • The variation law of the DC-link voltage of the MF-ASD under different conditions is analyzed. • The proposed alternate arc suppression method does not need additional DC power supply devices. • The MF-ASD can also realize the DC-link voltage stability when the active component of the fault current is large. To fully compensate reactive and active components of the single line-to-ground (SLG) fault current, additional DC power supply devices are usually used for arc suppression devices. Therefore, the alternate arc suppression method is proposed for the non-neutral multi-function arc suppression device (MF-ASD) in this paper, which can achieve energy self-balance in the MF-ASD during the SLG fault without additional DC power supply devices. Firstly, the DC-link charge–discharge characteristic of the MF-ASD is analyzed under different SLG fault conditions. Then, the alternate arc suppression principle and energy flow law between two non-faulty phases of the MF-ASD are described in detail. Further, the relationship between the alternate period, switching time, and the DC-link voltage are deduced as well. Then, the control parameters are reasonably designed for the DC-link voltage stability of two non-faulty phases of the MF-ASD. Finally, the correctness and feasibility of the proposed method are verified by simulation and experiment results. [ABSTRACT FROM AUTHOR]