Search

This article focuses on application specific integrated circuits (ASIC). The rules of the ASIC game are changing as the cost to fabricate a custom solution creeps past the million-dollar mark. And, new rules are emerging due to the shorter market life of the end system and the continuous need to upgrade or update a product's features. Device cost is always a key factor for filed programmable gate arrays (FPGAs), especially those used in the final version of a product. The high-density, resource-rich, top-of-the-line FPGAs tend to cost several hundred dollars to over a $1000 apiece, even in moderate volume. INSETS: FPGAs ENTER NEW DESIGN TERRITORY;STRUCTURED ASICs COMPETE WITH, AND COMPLEMENT, FPGAs.

Over the last half decade, a new class of configurable application specific integrated circuits (ASIC) has made inroads by bridging the performance and cost gap between designs based on full custom ASIC and high density field programmable gate arrays (FPGA). Known as platform and structured ASICs, these system-on-a-chip solutions are some of the best aspects of custom ASIC and FPGA. As a result, designers have a quick time-to-market option that features lower development costs than ASIC and higher performance and often lower unit costs that FPGAs.

The article presents questions and answers related to the functioning of field-programmable gate-array (FPGA). One question was related to the efficiency of FPGAs in keeping the standby power consumption lower. Flash-based FPGAs typically use less than 25% of the transistors needed to configure the logic versus the static random access memory (SRAM) configuration scheme, because only a single flash transistor serves as the configuration element. So, leakage currents can be considerably smaller than SRAM-based FPGAs. Typical stand-by currents range from 1 to 10 mA. The three mainstream FPGA approaches significantly vary in static and standby power consumption due to the differences in the configuration technologies employed within the chips. Second question was how switching between active and low-power modes impacts the system performance. When an FPGA switches into a standby mode, the circuits usually can power down immediately. In older FPGAs, externally gating the clock and possibly lowering the supply voltage can do this.

The article presents information about various digital electronics products. Now that a billion-plus transistors can fit onto one processor chip, the race to push CPU clock rates has reached a point of diminishing returns due to increasing power consumption. In the nonvolatile memory arena, this year saw the introduction of the first 16-Gbit flash-memory chips from Samsung. These chips are the highest-capacity devices yet released and can replace many of the micro hard drives now used in portable music players. A more realistic gaming experience, on a PC or gaming console, is the charge of advanced graphics chips from ATI and nVidia that deliver 3D images that are more lifelike. In addition to CPUs, memory, and graphics, many other noteworthy products help to drive next-generation system designs. Multi-megagate FPGAs with 10-Gbit serializer/deserializer ports, low-power media processors, and high-resolution imaging chips are among the many candidates.

Features the HardCopy, hardwired versions of the Stratix field programmable gate arrays from Altera Corp. Reduction of the size of integrated circuits; Inclusion of optimized embedded digital-signal-processing blocks; Support of the design by the version 3.0 of the Quartus II computer software.