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In‐memory computing, particularly neuromorphic computing, has emerged as a promising solution to overcome the energy and time‐consuming challenges associated with the von Neumann architecture. The ferroelectric field‐effect transistor (FeFET) technology, with its fast and energy‐efficient switching and nonvolatile memory, is a potential candidate for enabling both computing and memory within a single transistor. In this study, the capabilities of an integrated ferroelectric HfO2 and 2D MoS2 channel FeFET in achieving high‐performance 4‐bit per cell memory with low variation and power consumption synapses, while retaining the ability to implement diverse learning rules, are demonstrated. Notably, this device accurately recognizes MNIST handwritten digits with over 94% accuracy using online training mode. These results highlight the potential of FeFET‐based in‐memory computing for future neuromorphic computing applications. [ABSTRACT FROM AUTHOR]

Reservoir computing (RC) architecture which mimics the human brain is a fundamentally preferred method to process dynamical systems that evolve with time. However, the difficulty in generating rich reservoir states using two‐terminal devices remains challenging, which hinders its hardware implementation. Herein, the 1D array of ferroelectric field‐effect transistor (Fe‐FET) based on α‐In2Se3 channel, which shows volatile memory effect for realizing various RC systems, is demonstrated. The fading effect in α‐In2Se3 is sufficiently investigated by polarization dynamic model. The proposed Fe‐FET is capable of experimentally classifying images using MNIST dataset with a high accuracy of 91%. Furthermore, time‐series real‐life chaotic system, for example, Earth's weather, can be accurately forecasted using our Ferro‐RC based on the Jena climate dataset recorded in a 1 year period. Remarkable determination coefficient (R2) of 0.9983 and normalized root mean square error (NRMSE) of 8.3 × 10−3 are achieved using a minimized readout network. The demonstration of integrated memory and computation opens a route for realizing a compact RC hardware system. [ABSTRACT FROM AUTHOR]

A surface potential based compact model for two-dimensional field effect transistors (2D-FETs) is proposed to incorporate the structural disorders induced transition behaviors among variable range hopping (VRH), nearest neighbor hopping (NNH), and band-like transport in most 2D materials. These functions coupled with effective transport energy and multiple trapping and releasing theory enable our developed model to predict the temperature and carrier density dependent current characteristics. Its validity is confirmed by the experimental results such as the metal insulator transition (MIT) in transition metal dichalcogenides and VRH-NNH transition in black phosphorus nanoribbon. Based on this model, the band-tail effects on the crossover gate voltage of MIT behavior are quantitatively investigated. It is found that the transition behavior is closely related to the distribution of the band-tail states. Furthermore, this model is implemented in Verilog-A for circuit-level prediction and evaluation of 2D-FETs to provide deeper insight into the relationship between material properties, device physics, and circuit performances. [ABSTRACT FROM AUTHOR]

2D semiconductor field‐effect transistors (2D FETs) have emerged as a promising candidate for beyond‐silicon electronics applications. However, its device performance has often been limited by the metal‐2D semiconductor contact, and the non‐negligible contact resistance (RSD) not only deteriorates the on‐state current but also hinders the direct characterization of the intrinsic properties of 2D semiconductors (e.g., intrinsic charge carrier mobility, μint). Therefore, a proper extraction technique that can independently characterize the metal‐2D semiconductor contact behavior and the intrinsic properties of a 2D semiconducting layer is highly desired. In this study, a universal yet simple method is developed to accurately extract the critical parameters in 2D FETs, including characteristic temperature (To), threshold voltage (VT), RSD, and μint. The practicability of this method is extensively explored by characterizing the temperature‐dependent carrier transport behavior and the strain‐induced band structure modification in 2D semiconductors. Technology computer aided design simulation is subsequently employed to verify the precision of RSD extraction. Furthermore, the universality of the proposed method is validated by successfully implementing the extraction to various 2D semiconductors, including black phosphorus, indium selenide, molybdenum disulfide, rhenium disulfide, and tungsten disulfide with top‐ and bottom‐gated configurations. [ABSTRACT FROM AUTHOR]

This article presents an analytical method for parameter extraction in oxide semiconductor field-effect transistors (OS FETs), including threshold voltage (VT), effective channel length (Leff), source–drain series resistance (RSD), and intrinsic effective mobility (μint). An analytical expression of effective mobility (μeff) is implemented with the consideration of percolation conduction and RSD effects. This method relies on the concept of Y-function method and the channel length dependent measurement. The extraction results are compared to those from the combination of transfer length method (TLM). It has been shown that a better accuracy of the extracted parameters is achieved with the proposed method. Furthermore, transfer characteristics are resimulated based on the extracted parameters, in which a good match between measurement and simulation is obtained. [ABSTRACT FROM AUTHOR]

The analog resistive switching (RS) characteristics in 2-D polycrystalline (poly-) molybdenum disulfide (MoS2) field-effect transistors (FETs) enable new electronic devices capable of emulating biological synaptic behaviors. In 2-D poly-materials, grain boundary (GB)-induced trap states are of major significance to RS behaviors. However, there is still a lack of appropriate compact models that capture accurate physical mechanisms. Therefore, we developed a surface potential-based compact model, based on the theories of the GB energy barrier and space charge limited current (SCLC). By calibrating to experimental data of MoS2, the physical parameters are extracted, and the model explains the scaling behaviors of channel lengths and grain sizes. Due to the electric-field-induced defect redistribution, the energy barrier modulation at a single-GB (e.g., intersecting GB) quantitatively matches the reported experiments. Moreover, the possible SCLC-based RS behavior is also investigated. Furthermore, we have optimized the set/reset process and simulated the postsynaptic current (PSC) with a tunable potentiation (or depression) process, and then the gate voltage dependence and statistical effects on RS and PSC have been investigated. Thus, this model provides important devices physics insights of 2-D poly-materials and it guides device design, fabrication, and material engineering, to meet the requirements of the future neuromorphic computing application. [ABSTRACT FROM AUTHOR]

Two-dimensional black phosphorus (BP) holds great promise for future nanoscale field-effect transistors owing to its finite bandgap and expected high carrier mobility. Nevertheless, while most studies have reported unipolar p-type or ambipolar BP transistors with a hole conduction dominance, excellent n-type transport in BP has been a critical challenge. Here, we report unipolar n-type BP transistors realized by a MgO capping layer via atomic layer deposition. By coverage with 20-nm-thick MgO, remarkable electron conduction is obtained in transistors fabricated on BP flakes of thicknesses from 2.6 to 7.6 nm, accompanied by fully suppressed hole transport. Furthermore, the unipolar electron transport is found to retain (or even improve) after a period of six months, with the highest extrinsic electron mobility reaching 135.9 cm2/Vs. The effective approach to realizing unipolar n-FETs of BP demonstrated in this letter paves the way to the implementation of BP-based CMOS digital logic circuits. [ABSTRACT FROM AUTHOR]

This paper demonstrates a high-performance black phosphorus nanoribbons field-effect transistor (BPNR-FET) and systematically investigates methods for enhancing its anisotropic carrier transport. The BPNR-FET shows a strong dependence on crystal orientation in which the best mobility performance is achieved in armchair-oriented nanoribbons. A downscaling of nanoribbon width is shown to improve the short-channel effect owing to a better electrostatic gate control. Furthermore, hydrogenation is employed to effectively passivate the dangling bonds and heal the nanoribbon edge defects, leading to nearly hysteresis-free transfer properties. By virtue of bandgap and contact-metal workfunction engineering, n-type BPNR-FET is successfully demonstrated, which enables complementary inverter circuits to be simultaneously realized. This paper unravels the superior performance underscores a conceptually new BPNR-FET, paving the way toward the development of non-planar devices and integrated circuits based on 2-D materials platform. [ABSTRACT FROM AUTHOR]

Abstract: Achieving excellent electrostatic control and immunity to short channel effects are the formidable challenges in ultrascaled devices. 3D device architectures, such as nanoribbon, have successfully mitigated these problems by achieving uniform top‐ and side‐wall control of the channel. Here, by leveraging on the merits of 3D structure, high‐mobility black phosphorus nanoribbon field‐effect transistors (BPNR‐FET) are demonstrated and the anisotropic transport properties are systematically investigated. A simple top‐down reactive ion etching method is used to realize both armchair‐ and zigzag‐oriented nanoribbons with various widths down to 60 nm. The mobility of BPNR‐FET is found to be width‐ and thickness‐dependent, with the highest hole mobility of ≈862 cm2 V−1 s−1 demonstrated in armchair‐oriented device at room temperature by combining high‐κ gate dielectric and hydrogen treatment to reduce sidewall scattering. Furthermore, hydrogenation effectively passivates the nanoribbon dangling bonds, leading to hysteresis and contact resistance improvement. This work unravels the superior electrical performance underscore a conceptually new device based on BP nanoribbons, paving the way toward the development of nonplanar devices on 2D materials platform. [ABSTRACT FROM AUTHOR]

Monolayer W xMo1− xS2-based field effect transistors are demonstrated for the first time on the monolayer W xMo1− xS2 flake, which is grown by the chemical vapor deposition method under an atmospheric pressure. Detailed material studies using Raman and photoluminescence measurements have been carried out on the as-grown monolayer W xMo1− xS2. Electronic band structure of monolayer W xMo1− xS2 has been calculated using first-principle theory. The thermal stability of monolayer W xMo1− xS2 has been evaluated using Raman-temperature measurement. Carrier transport study on the fabricated W xMo1− xS2 FETs has been analyzed using temperature-dependent current measurement, and a field effect mobility of ≈30 cm2 V−1 s−1 at 300 K is obtained. [ABSTRACT FROM AUTHOR]

Double-gate FinFET (\110)\langle \110\rangle and (\100)\langle \100\rangle electron mobility (\mue) and hole mobility (\muh) are experimentally investigated for the following: 1) a wide range of boron and phosphorus fin doping concentrations and 2) a wide variety of gate stacks combining \HfO2, \SiO2, or SiON insulators with TiN or poly-Si electrodes. It is found out that, irrespective of fin doping and gate stack, (\110)\langle\110\rangle\ \mue is competitive with the (\100)\langle\100\rangle\ \mue, while (\110)\langle\110\rangle\ \muh is \geq \2 \times higher than (\100)\langle\100\rangle\ \muh. Inversion \mue and \muh are independent of doping as long as the effective field/doping combination enables the screening of the depletion charge. Mobility degradation with doping is significantly lower in accumulation mode (AM) than in inversion mode (IM) such that, for heavily B-doped fins, AM hole mobility exceeds the IM electron mobility even in (100) FinFETs. In undoped fins, ALD TiN gate stress is observed to improve \mue  for both orientations without degrading \muh. [ABSTRACT FROM AUTHOR]

The rediscovery of graphene in the recent past has propelled the rapid development of exfoliation and other thin layer processing techniques, leading to a renewed interest in black phosphorus (BP). Since 2014, BP has been extensively studied due to its superior electronic, photonic, and mechanical properties. In addition, the unique intrinsic anisotropic characteristics resulting from its puckered structure can be utilized for designing new functional devices. In retrospect, significant efforts have been directed toward the synthesis, basic understanding, and applications of BP in the fields of nanoelectronics, ultrafast optics, nanophotonics, and optoelectronics. Here, the recent development of BP‐based devices, such as nanoribbon field‐effect transistors, complementary logic circuits, memory devices, and the progress made in meeting the challenges associated with contact resistance, in‐plane anisotropy, and advanced gate stack, are reviewed. Finally, the prospects of 2D materials in meeting the International Technology Roadmap for Semiconductor requirements for the year 2030 are discussed. The recent development of black phosphorus based electronic devices, such as nanoribbon field‐effect transistors, complementary logic circuits, memory, and the progress made in meeting the challenges associated with contact resistance, in‐plane anisotropy, and advanced gate stack are reviewed. The prospects of 2D materials in meeting the International Technology Roadmap for Semiconductor requirements for the year 2030 are also discussed. [ABSTRACT FROM AUTHOR]