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We fabricate n-channel silicon bulk FinFET with silicon nitride (Si3N4) high- \kappa , silicon nitride/silicon dioxide dual- \kappa , and silicon dioxide (SiO2) low- \kappa spacers, and compare their performance using measurements and TCAD simulations. While all the three devices show similar dc performance, the ac and transient performance of low- \kappa spacer FinFET is better due to lower parasitic capacitance ( {C}_{\mathrm {par}} ). We show that {C} _{\mathrm {par}} in SiO2 spacer FinFET is about half of that with Si3N4 spacer. When the gate length is scaled, the contribution of C \mathrm {par} compared with the intrinsic capacitance ( C \mathrm {ox} ) increases. For FinFET with Si3N4 spacers, C \mathrm {par}/C \mathrm {ox} increases from 36% at 30-nm gate length to 105% when the gate length is scaled to 10 nm, while for FinFET with SiO2 spacers, the ratio changes from 19% to 55% making the latter more suitable for scaling. For SiO2 spacer FinFET, inverter delay is about 13% and 25% lower than Si3N4 spacer FinFET for gate lengths of 30 and 10 nm, respectively. [ABSTRACT FROM PUBLISHER]

Using a self-aligned sidewall microcrystalline-silicon (\muc\-Si) dual channel, comprising a sub-50-nm channel width, a novel 3-D stackable maskless embedded metal-gate thin-film-transistor nanowire device was fabricated on top metal using a tungsten gate-stack and trilayered oxide/nitride/oxide gate dielectric. The results of using a charge-transferring mechanism based on the solution-phased pH of a phosphate buffer solution and vascular endothelial growth factor showed that \muc\-Si surfaces exhibit high potential for use in bioelectronics. The device exhibits long-term reliability regarding bioelectronic probing and is as reliable as the commercially available enzyme-linked immunosorbent assay when conducting a targeted, 100-day therapy for ovarian cancer. Thus, the proposed device exhibits potential for use in label-free, economical, and highly reliable lab-on-chip 3-D applications. [ABSTRACT FROM PUBLISHER]

This paper reports a versatile nano-sensor technology using "top-down" poly-silicon nanowire field-effect transistors (FETs) in the conventional Complementary Metal-Oxide Semiconductor (CMOS)-compatible semiconductor process. The nanowire manufacturing technique reduced nanowire width scaling to 50 nm without use of extra lithography equipment, and exhibited superior device uniformity. These n type polysilicon nanowire FETs have positive pH sensitivity (100 mV/pH) and sensitive deoxyribonucleic acid (DNA) detection ability (100 pM) at normal system operation voltages. Specially designed oxide-nitride-oxide buried oxide nanowire realizes an electrically Vth-adjustable sensor to compensate device variation. These nanowire FETs also enable non-volatile memory application for a large and steady Vth adjustment window (>2 V Programming/Erasing window). The CMOS-compatible manufacturing technique of polysilicon nanowire FETs offers a possible solution for commercial System-on-Chip biosensor application, which enables portable physiology monitoring and in situ recording. [ABSTRACT FROM AUTHOR]

In this study, we describe the urinary quantification of apolipoprotein A II protein (APOA2 protein), a biomarker for the diagnosis of bladder cancer, using an n-type polycrystalline silicon nanowire field-effect transistor (poly-SiNW-FET). The modification of poly-SiNW-FET by magnetic graphene with long-chain acid groups (MGLA) synthesized via Friedel–Crafts acylation was compared with that obtained using short-chain acid groups (MGSA). Compared with MGSA, the MGLA showed a higher immobilization degree and bioactivity to the anti-APOA2 antibody (Ab) due to its lower steric hindrance. In addition, the magnetic properties enabled rapid separation and purification during Ab immobilization, ultimately preserving its bioactivity. The Ab-MGLA/poly-SiNW-FET exhibited a linear dependence of relative response to the logarithmical concentration in a range between 19.5 pg mL −1 and 1.95 µg mL −1 , with a limit of detection (LOD) of 6.7 pg mL −1 . An additional washing step before measurement aimed at excluding the interfering biocomponents ensured the reliability of the assay. We conclude that our biosensor efficiently distinguishes mean values of urinary APOA2 protein concentrations between patients with bladder cancer (29–344 ng mL −1 ) and those with hernia (0.425–9.47 ng mL −1 ). [ABSTRACT FROM AUTHOR]

NBTI trapped charge characteristics and recovery mechanisms are examined by a statistical study of individual trapped charge emissions in nanoscale HfSiON/metal gate pMOSFETs. We measure individual trapped charge emission times in NBTI recovery in a large number of devices. The characteristic time distributions of the first three emitted holes are obtained. The distributions can be well modeled by using a thermally-assisted tunnel (ThAT) detrapping model. NBTI trapped charge energy and spatial distributions and its activation energy distribution in the ThAT model are discussed and extracted. Based on the ThAT model and measured result of single-charge induced Vt shifts, we develop a statistical NBTI recovery \Delta Vt evolution model. Our model can well reproduce the temporal evolutions of a \Delta Vt distribution in a number of NBTI stressed nanometer MOSFETs in relaxation. [ABSTRACT FROM AUTHOR]

The electrical characteristics of FinFETs with a crystalline ZrO2/Al2O3 buffer layer gate stack and a crystalline ZrO2 high-K dielectric single layer, along with different fin widths and gate lengths, are investigated. Compared with the FinFETs with a single layer of crystalline ZrO2 high-K dielectric, the gate stack comprising the crystalline ZrO2/Al2O3 buffer layer on FinFETs leads to the suppression of short channel effects in terms of a low drain induced barrier lowering, reduced threshold voltage roll-off, and improved subthreshold swing. The ON/OFF current ratio and gate leakage current of FinFETs are also improved by the crystalline ZrO2/Al2O3 buffer layer gate stack. The improvement of electrical characteristics is ascribed to the reduced interface state density and gate leakage as a result of the insertion of an Al2O3 buffer layer between ZrO2 and Si. The results demonstrate that the crystalline ZrO2/Al2O3 buffer layer structure is a promising high-K gate stack for next-generation nanoscale transistors. [ABSTRACT FROM AUTHOR]