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Growth and characterization of metal‐oxide thin films foster successful development of oxide‐material‐integrated thin‐film devices represented by metal‐oxide‐semiconductor field‐effect transistors (MOSFET), drawing enormous technological and scientific interest for several decades. In recent years, functional oxide heterostructures have demonstrated remarkable achievements in modern technologies and provided deeper insights into condensed‐matter physics and materials science owing to their versatile tunability and selective amplification of the functionalities. One of the most critical aspects of their physical properties is the polar perturbation stemming from the ionic framework of an oxide. By engineering and exploiting the structural, electrical, magnetic, and optical characteristics through various routes, numerous perceptive studies have clearly shown how polar perturbations advance functionalities or drive exotic physical phenomena in complex oxide heterostructures. In this review, both intrinsic (engraved by thin‐film heteroepitaxy) and extrinsic (reversibly controllable defect‐mediated disorder and polar adsorbates) elements of polar perturbations, highlighting their abilities for the development of highly tunable functional properties are summarized. Scientifically, the recent approaches of polar perturbations render one to consolidate a prospect of atomic‐level manipulation of polar order in epitaxial oxide thin films. Technologically, this review also offers useful guidelines for rational design to heterogeneously integrated oxide‐based multi‐functional devices with high performances. [ABSTRACT FROM AUTHOR]

The c-axis aligned crystalline indium-gallium-zinc-oxide field-effect transistor (CAAC-IGZO FET), exhibiting an extremely low off-state leakage current (~10−22 A/μm), has promised to be an ideal candidate for Dynamic Random Access Memory (DRAM) applications. However, the instabilities leaded by the drift of the threshold voltage in various stress seriously affect the device application. To better develop high performance CAAC-IGZO FET for DRAM applications, it's essential to uncover the deep physical process of charge transport mechanism in CAAC-IGZO FET. In this work, by combining the first-principles calculations and nonradiative multiphonon theory, the charge trapping and emission properties in CAAC-IGZO FET have been systematically investigated. It is found that under positive bias stress, hydrogen interstitial in Al2O3 gate dielectric is probable effective electron trap center, which has the transition level (ε (+1/−1) = 0.52 eV) above Fermi level. But it has a high capture barrier about 1.4 eV and low capture rate. Under negative bias stress, oxygen vacancy in Al2O3 gate dielectric and CAAC-IGZO active layer are probable effective electron emission centers whose transition level ε (+2/0) distributed at −0.73~−0.98 eV and 0.69 eV below Fermi level. They have a relatively low emission barrier of about 0.5 eV and 0.25 eV and high emission rate. To overcome the instability in CAAC-IGZO FET, some approaches can be taken to control the hydrogen concentration in Al2O3 dielectric layer and the concentration of the oxygen vacancy. This work can help to understand the mechanisms of instability of CAAC-IGZO transistor caused by the charge capture/emission process. [ABSTRACT FROM AUTHOR]

For the first time, a core drain current model based on surface potential without any implicit functions is developed for beta-phase gallium oxide (β-Ga2O3) power metal-oxide-semiconductor field-effect transistors (MOSFETs). The surface potential solution is analytically deduced by solving the Poisson equation with appropriate simplification assumptions in accumulation, partial-depletion, and full-depletion modes. Then, the drain current expression is analytically derived from the Pao–Sah integral as a function of the mobile charge density obtained from the surface potential at the source and drain terminals. In addition, nonlinear resistors in the source/drain access region are considered. It continuously predicts the characteristics of β-Ga2O3 power MOSFETs in all operation modes, including accumulation mode, partial-depletion mode, and full-depletion mode. Furthermore, the validity of the model is verified by comparing the results of the model with the numerical simulations carried out with the technology computer-aided design (TCAD) tool ATLAS Device Simulator from Silvaco. Good agreement between the proposed model and TCAD simulations is shown for β-Ga2O3 power MOSFETs with different intrinsic channel lengths, channel doping concentrations, and channel thicknesses. Ultimately, the Gummel symmetry test and the harmonic balance simulation test are performed to validate the model's robustness and convergence. [ABSTRACT FROM AUTHOR]

A surface potential based compact model for two-dimensional field effect transistors (2D-FETs) is proposed to incorporate the structural disorders induced transition behaviors among variable range hopping (VRH), nearest neighbor hopping (NNH), and band-like transport in most 2D materials. These functions coupled with effective transport energy and multiple trapping and releasing theory enable our developed model to predict the temperature and carrier density dependent current characteristics. Its validity is confirmed by the experimental results such as the metal insulator transition (MIT) in transition metal dichalcogenides and VRH-NNH transition in black phosphorus nanoribbon. Based on this model, the band-tail effects on the crossover gate voltage of MIT behavior are quantitatively investigated. It is found that the transition behavior is closely related to the distribution of the band-tail states. Furthermore, this model is implemented in Verilog-A for circuit-level prediction and evaluation of 2D-FETs to provide deeper insight into the relationship between material properties, device physics, and circuit performances. [ABSTRACT FROM AUTHOR]

This work reports the comprehensive study on asymmetric characteristic based on proposed stackable vertical Channel-All-Around (CAA) In-Ga-Zn-O field-effect transistors (IGZO FETs). Sufficient experimental data are analyzed for the reason of performance distinction between normal and reversed source/drain setup. Contact profile has great impacts on device characteristics such as short-channel effects and drain-induced barrier lowering (DIBL) due to different electric filed distributions in the IGZO channel near Schottky barrier. That is mainly caused by different etch process for upper and bottom electrodes, which doesn’t exist in planar structures. Furthermore, a 3-D technology computer-aided design (TCAD) device model is established. Interface defects are applied for slight variation in contact potential to verify the accuracy. Related analysis of contact barriers has been done based on simulation results. What’s more, channel length and etching depth of bottom electrode are also play a role in asymmetric characteristics, which could be applied as a reference to improve devices performance. [ABSTRACT FROM AUTHOR]

The analog resistive switching (RS) characteristics in 2-D polycrystalline (poly-) molybdenum disulfide (MoS2) field-effect transistors (FETs) enable new electronic devices capable of emulating biological synaptic behaviors. In 2-D poly-materials, grain boundary (GB)-induced trap states are of major significance to RS behaviors. However, there is still a lack of appropriate compact models that capture accurate physical mechanisms. Therefore, we developed a surface potential-based compact model, based on the theories of the GB energy barrier and space charge limited current (SCLC). By calibrating to experimental data of MoS2, the physical parameters are extracted, and the model explains the scaling behaviors of channel lengths and grain sizes. Due to the electric-field-induced defect redistribution, the energy barrier modulation at a single-GB (e.g., intersecting GB) quantitatively matches the reported experiments. Moreover, the possible SCLC-based RS behavior is also investigated. Furthermore, we have optimized the set/reset process and simulated the postsynaptic current (PSC) with a tunable potentiation (or depression) process, and then the gate voltage dependence and statistical effects on RS and PSC have been investigated. Thus, this model provides important devices physics insights of 2-D poly-materials and it guides device design, fabrication, and material engineering, to meet the requirements of the future neuromorphic computing application. [ABSTRACT FROM AUTHOR]

An improved cut-off frequency model of a modified equivalent circuit of graphene field-effect transistors, which incorporates the additional capacitive effect physically present due to dipole layer between the metal and the graphene, is proposed. The original equivalent circuit is not accurate for a large separation distance dipole layer. Based on the improved equivalent circuit model, a more accurate parameter extraction by two-port analysis is possible, and the cut-off frequency will be more accurate particularly for largely separated dipole layer near the Dirac point. Considering the dipole layer, the equivalent circuit is never investigated before, and the cut-off frequency model shows good agreement with experiments. [ABSTRACT FROM AUTHOR]