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This article proposes a tunable active inductor (AI)‐based voltage‐controlled oscillator (VCO) andbandpass filters (BPF) on a single integrated design in 90 nm CMOS process for wireless applications. By exploiting component sharing technique through single pole double throws switching method, a common AI is shared between VCO and BPFs. As the passive inductor is replaced by the AI and shared, silicon area consumption is significantly reduced. Transforming the inductor in tunable mode benefits to eliminate MOS varactors for tuning purposes; one step forward to reduce silicon area consumption. Operating as VCO, its frequency ranges from 1.93 to 6.22 GHz (tuning scope is 105%) for tuning voltage of 0.2 ∼ 1 V. The DC power consumption varies from 1.83 to 3.84 mW, and differential output power is 3.39 to − 2.99 dBm. The phase noise varies from − 81.32 to − 76.89 dBc/Hz, and the figure of merit has a value of − 148.74 dBc/Hz at 5.03 GHz frequency. While acting as BPF, two approaches of center frequency tuning are applied. The voltage tuning yields center frequency of 8.43 ∼ 7.08 GHz along with the maximum gain of 10.29 dB at 7.81 GHz. The capacitive tuning outputs frequency tuning of 7.64 ∼ 7.06 GHz. The BPF consumes DC power of 2.56 to 2.27 mW (voltage tuning) and 2.40 mW (capacitive tuning). The proposed design occupies a layout area of 1215.6 μm2. All the simulations have been performed considering parasitic elements evolved from the extraction of layout. Finally, a quantitative comparison and justification of the proposed design are made with respect to other published works. [ABSTRACT FROM AUTHOR]

This paper postulates a tunable active inductor-based voltage controlled oscillator for IEEE 802.11 a/b/g/n/ac applications in 90 nm CMOS process. In the designed VCO, the modified topology of the active inductor which uses regulated cascode is implemented along with tuning competency. The layout-based simulation has been performed considering parasitic resistances and capacitances. The designed VCO yields an oscillation frequency ranging from 1.93 GHz to 5.97 GHz having tuning scope of 102%, where the tuning voltages is varied from 0 V to 0.8 V. The power consumption varies from 0.97 mW to 3.32 mW, and the VCO provides a differential output power of 3.29 dBm to −4.76 dBm. The phase noise varies from −78.52 dBc/Hz to −70.45 dBc/Hz, and the figure of merit (FOM) has a value of −143.63 dBc/Hz @ 5.09 GHz frequency. The designed VCO has been passed through process corner analysis, Monte Carlo analysis, stability analysis and temperature swept analysis to evaluate its compatibility. Furthermore, the elimination of MOS varactor has reduced overall silicon area consumption (39.73 × 25.3 \mum). Finally, the designed VCO's performance parameters have been compared with referred designs where it is illustrated that the designed VCO outperforms the others in most cases along with a good scope for implementing both 2.4 GHz and 5 GHz frequency that is, IEEE 802.11a/b/g/n/ac applications. [ABSTRACT FROM AUTHOR]

This paper presents a varactorless tunable active inductor-based voltage controlled oscillator (VCO) in 90 nm CMOS process. The proposed VCO yields a wide tuning range of 116% with an output frequency of 1.19–4.46 GHz for the tuning voltage of 0.3–1.5 V. It consumes a low dc power ranging from 2.44 mW to 4.79 mW for the specified tuning range. The variation of phase noise ranges from − 8 3. 0 3 dBc/Hz to − 7 8. 6 5 dBc/Hz at 1 MHz offset with the change of tuning voltage as well as tuning frequency. The proposed varactorless VCO has a maximum Figure of Merit (FOM) of − 1 4 8. 8 5 dBc/Hz with a differential output power of 1.8 dBm at tuning voltage of 0.7 V. The elimination of varactor which abates the silicon area consumption and the minimization of the variation of performance parameters are the special outcomes of the proposed active inductor-based VCO. Comparing the performance parameters such as power consumption, FOM and tuning range, the proposed design outperforms most of the cited designs. [ABSTRACT FROM AUTHOR]

This paper presents a tunable active inductor based ultra-low power, low area voltage-controlled oscillator (VCO) in 90 nm CMOS process. In the designed VCO, the modified topology of the active inductor is employed along with tuning capability. The layoutbased simulation has been performed deeming parasitic resistances and capacitances. The designed VCO yields an oscillation frequency ranging from 1.38 GHz to 3.16 GHz with a tuning range of 78.41%, where the tuning voltage is driven from 0.4 V to −0.2 V. The power dissipation varies from 0.062 mW to 0.177 mW, and the VCO provides a differential output power of 8.34 dBm to 3.94 dBm. The phase noise varies from −71 dBc/Hz to −65.4 dBc/Hz, and the Figure of Merit (FoM) has a value of −143.09 dBc/Hz @ 2.79 GHz frequency. The process corner analysis, temperature swept analysis, and Monte Carlo analysis of the proposed VCO had been carried out for the evaluation of its compatibility for diversified environments. Furthermore, the exclusion of the MOS varactor has condensed total silicon area consumption (10.3 μm × 8.5 μm). Finally, the designed VCO's performance parameters have been compared with mentioned designs where it is demonstrated that the designed VCO outdoes the others in most cases along with outstanding outcomes of low power and low silicon area consumption. [ABSTRACT FROM AUTHOR]