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Summary: In this article, an injection‐locked frequency divider (ILFD) is presented. By assuming the maximum phase of the tank current, we obtain a relation for the lock range. Besides, the effects of parasitic capacitors on the lock range have been probed. The analysis shows that the greater the phase difference between the tail current and injected signal, the phase of the tank current increases and, consequently, the lock range also increases. The accomplished simulations confirm the correct performance of the proposed design and the extracted relationships. The simulations have been CMOS technology and with a 0.9‐V supply voltage. The results show that the current consumption equals 3.7 mA and the power consumption equals 3.33 mW. The proposed ILFD lock range with phase shift technique with power input signal 0 dBm is equal to 5.1 GHz (3.6–8.7 GHz), and the relative percentage of the lock range is also 83%. [ABSTRACT FROM AUTHOR]

This study presents the new locking range enhancement technique in divide‐by‐two injection locked frequency divider using a phase shifter circuit. The proposed divide‐by‐two phase shifter injection locking frequency divider (ILFD) is based on complementary metal–oxide–semiconductor (CMOS) cross‐coupled oscillator with dual‐resonance fourth‐order LC‐tank that is designed and simulated in 0.18 μm Taiwan Semiconductor Manufacturing Company (TSMC) CMOS technology. Using a phase shifter branch, an extra current with a new phase angle towards oscillator current will inject into the LC tank and moves the locking angle to a new and wider angle that leads to a wide locking range. In an analysis, the effect of the phase shifter circuit on the proposed ILFD has been explained. Simulation results show that at a supply voltage of 0.95 V, the phase shift ILFD consumes 7.32 mW power and at the incident signal power of 0 dBm the locking range is 5.25 GHz, from 4.3 to 9.55 GHz and the relative locking range is 75.81%. [ABSTRACT FROM AUTHOR]

This paper presents a novel approach to study the phase error in source injection coupled quadrature oscillators (QOs). Like other LC QOs, the mismatches between LC tanks are the main source of phase error in this oscillator. The QO is analyzed where the phase error and oscillation frequency are derived in terms of circuit parameters. The proposed analysis shows that the output phase error is a function of injection current and the current of source equivalent capacitor. As a result, it is shown that increasing of tail current and LC tank quality factor decreases the phase error. Derived equations show that the phase error can be cancelled and even controlled by adjusting bias currents. To evaluate the proposed analysis and consequent designed QO, a 5.5 GHz CMOS QO is designed and simulated using the practical 0.18 µm TSMC CMOS technology. The experiments show good agreement between analytical equations and simulation results. Copyright © 2013 John Wiley & Sons, Ltd. [ABSTRACT FROM AUTHOR]