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Current collapse is a phenomenon that increases the channel resistance during the switching process when the high gate and drain voltages are applied. The effect can be found from GaN-based high-electron mobility transistors (HEMTs) and is an obstacle for their applications to power electronics. There have been numerous reports on suppressing current collapse using semiconductor process technologies. In this paper, an enhancement mode (E-mode) AlGaN/GaN/AlGaN double heterostructure was proposed. The current collapse phenomena were studied on devices of E-mode MIS and Schottky gate HEMTs. The results indicate the suppression of current collapse for devices with double heterostructure. [ABSTRACT FROM AUTHOR]

In this study, novel three-dimensional (3-D) nanoscale structures and methodology are demonstrated for application in high-efficiency core–shell nanorod (NR) light-emitting diodes (LEDs). The key to our successful growth of the structures is the introduction of passivation, which can be used to selectively grow active layers in desired structures. Through the fabrication methodology, core–shell NR green LEDs exhibiting large nonpolar active region and homogeneous indium distributions without a point tip shape were achieved. Stable light emission at a central wavelength of 518 nm was achieved as the injected current increased to more than 40 mA. The improved NR LEDs exhibited a stable luminescence emission wavelength (blueshift of 62 nm) and low-efficiency droop (18.1%) at 200 mA. Our scheme is scalable and compatible with current technologies, which provides a new perspective for developing high-performance, 3-D nanoscale optoelectronic devices. [ABSTRACT FROM PUBLISHER]

The flip chip ultraviolet light-emitting diodes (FC UV-LEDs) with a wavelength of 365 nm are developed with the ex situ reactive plasma deposited (RPD) AlN nucleation layer on patterned sapphire substrate (PSS) by an atmospheric pressure metal-organic chemical vapor deposition (AP MOCVD). The ex situ RPD AlN nucleation layer can significantly reduce dislocation density and thus improve the crystal quality of the GaN epitaxial layers. Utilizing high-resolution X-ray diffraction, the full width at half maximum of the rocking curve shows that the crystalline quality of the epitaxial layer with the (RPD) AlN nucleation layer is better than that with the low-temperature GaN (LT-GaN) nucleation layer. The threading dislocation density (TDD) is estimated by transmission electron microscopy (TEM), which shows the reduction from 6.8 × 10 cm to 2.6 × 10 cm. Furthermore, the light output power (LOP) of the LEDs with the RPD AlN nucleation layer has been improved up to 30 % at a forward current of 350 mA compared to that of the LEDs grown on PSS with conventional LT-GaN nucleation layer. [ABSTRACT FROM AUTHOR]

GaN HEMT has attracted a lot of attention in recent years owing to its wide applications from the high-frequency power amplifier to the high voltage devices used in power electronic systems. Development of GaN HEMT on Si-based substrate is currently the main focus of the industry to reduce the cost as well as to integrate GaN with Si-based components. However, the direct growth of GaN on Si has the challenge of high defect density that compromises the performance, reliability, and yield. Defects are typically nucleated at the GaN/Si heterointerface due to both lattice and thermal mismatches between GaN and Si. In this article, we will review the current status of GaN on Si in terms of epitaxy and device performances in high frequency and high-power applications. Recently, different substrate structures including silicon-on-insulator (SOI) and engineered poly-AlN (QST®) are introduced to enhance the epitaxy quality by reducing the mismatches. We will discuss the development and potential benefit of these novel substrates. Moreover, SOI may provide a path to enable the integration of GaN with Si CMOS. Finally, the recent development of 3D hetero-integration technology to combine GaN technology and CMOS is also illustrated. [ABSTRACT FROM AUTHOR]

GaN has been widely used to develop devices for high-power and high-frequency applications owing to its higher breakdown voltage and high electron saturation velocity. The GaN HEMT radio frequency (RF) power amplifier is the first commercialized product which is fabricated using the conventional Au-based III–V device manufacturing process. In recent years, owing to the increased applications in power electronics, and expanded applications in RF and millimeter-wave (mmW) power amplifiers for 5G mobile communications, the development of high-volume production techniques derived from CMOS technology for GaN electronic devices has become highly demanded. In this article, we will review the history and principles of each unit process for conventional HEMT technology with Au-based metallization schemes, including epitaxy, ohmic contact, and Schottky metal gate technology. The evolution and status of CMOS-compatible Au-less process technology will then be described and discussed. In particular, novel process techniques such as regrown ohmic layers and metal–insulator–semiconductor (MIS) gates are illustrated. New enhancement-mode device technology based on the p-GaN gate is also reviewed. The vertical GaN device is a new direction of development for devices used in high-power applications, and we will also highlight the key features of such kind of device technology. [ABSTRACT FROM AUTHOR]