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This paper presents the design and experimental characterization of a power transfer system performing a dc–dc conversion with on-chip galvanic isolation. The converter is operated in the VHF band, which enables fully integration of all the required components in silicon technology. It consists of only two silicon dice, i.e., a power oscillator with an on-chip isolation transformer and a full-bridge rectifier, which are fabricated in 0.35–µm BCD and 0.13–µm CMOS technology, respectively. A thick SiO2 layer was used, which guarantees galvanic isolation between the transformer windings. A co-design procedure for the system building blocks is proposed, which aims at optimizing the dc–dc converter performance in terms of power efficiency at a given power density. Thanks to the adopted approach, a maximum output power up to 980 mW is demonstrated with a power efficiency of 29.6%. This paper outperforms previously reported integrated inductive step-up converters in terms of power per silicon area (up to 105 mW/mm2), while providing on-chip galvanic isolation without any discrete devices or post-processing steps. [ABSTRACT FROM PUBLISHER]

This brief presents a fully integrated dc–dc converter consisting of only two CMOS chips, which are a power oscillator with an integrated transformer and a full-bridge rectifier. A thick inter-metal oxide layer guarantees a galvanic isolation rating as high as 5 kV. A current-reuse hybrid-coupled oscillator is proposed, which is based on a three-winding tapped isolation transformer and improves both output power and silicon area occupation with respect to previous works. The converter is operated at 5-V power supply and is able to deliver up to 300-mW dc power at 10-V output voltage while exhibiting a power density and a power efficiency of 36 mW/mm2 and 24%, respectively. [ABSTRACT FROM PUBLISHER]

This paper presents the design of on-chip micro-antennas for package-scale galvanic isolators based on RF planar coupling. A step-by-step design procedure is proposed, which aims at the maximization of the weak electromagnetic coupling between the RX and TX antennas integrated on side-by-side co-packaged chips to enable both high isolation rating and common-mode transient immunity thanks to the high dielectric strength and low capacitive parasitics of a molding compound-based galvanic barrier, respectively. Micro-antenna design guidelines are drawn, highlighting the main relationship between coil coupling performance and their layout parameters, which are often in contrast with respect to traditional integrated inductor ones. [ABSTRACT FROM AUTHOR]

This paper exploits an effective approach to overcome the breakdown limitations of traditional galvanic isolators based on chip-scale isolation barriers, thus achieving a very high isolation rating (i.e., compliant with the reinforced isolation requirements). Such an approach is based on radio frequency (RF) planar coupling between two side-by-side co-packaged chips. Standard packaging along with proper assembling techniques can be profitably used to go beyond 20-kV surge voltage without using expensive or exotic isolation components. As a proof of concept, a bidirectional data transfer system based on RF planar coupling able to withstand an isolation rating as high as 25 kV has been designed in a low-cost standard 0.35-µm CMOS technology. Experimental measurements demonstrated a maximum data rate of 40 Mbit/s using a carrier frequency of about 1 GHz. The adopted approach also guarantees a common mode transient immunity (CMTI) of 250 kV/µs, which is a first-rate performance in view of next generation galvanic isolators for wide-bandgap power semiconductor devices, such as gallium nitride high-electron mobility transistors (GaN HEMTs) and silicon carbide (SiC) MOSFETs. [ABSTRACT FROM AUTHOR]

Abstract This work presents a review of integrated transformers for galvanic isolation with particular focus on their modelling in power transfer systems. A comparison between transformer-coupled oscillator topologies is carried out, highlighting the main differences in the realization of the isolation transformers. Lumped geometrically scalable modelling of the most adopted isolation transformer topologies are presented and compared. Transformer models have been validated by means of electromagnetic simulations in a wide range of geometrical parameters, achieving absolute errors lower than 12% for inductance, Q -factor peak, self-resonance frequency, and magnetic coupling factor. Highlights • A review of integrated transformers for galvanically isolated dc-dc converters. • Scalable lumped models of three different transformer configurations are compared. • The results can be exploited within an iterative co-design procedure. [ABSTRACT FROM AUTHOR]