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For N-cells cascaded H-bridge (CHB) inverters based on unipolar double frequency phase-shifted pulsewidth modulation (PS-PWM), the output voltage is distorted and its harmonics are difficult to be suppressed under unbalanced conditions (different dc voltages and/or modulation indices). This article proposes a closed-loop harmonic suppression scheme based on the PS-PWM, and the scheme is easily implemented in the dq frame to adaptively adjust the displacement angles of the triangular carriers. The harmonic content can be suppressed to its possible minimum value without the limitation of the operational point by the proposed method. The adjustment rules of displacement angles and the harmonic suppression principle are presented in detail. This method can effectively restrain harmonic magnitudes without the limitation of the cells number and does not require complicated trigonometric function calculations or optimization algorithms. Moreover, the principle of symmetrical sideband harmonic suppression is also discussed. The effectiveness of the proposed method is verified by a downscale test platform of the single-phase CHB inverter. [ABSTRACT FROM AUTHOR]

The feature of the modular multilevel converter (MMC) may worse the power quality, due to the additional harmonics caused by the harmonic coupling between the grid and the dc bus. It is difficult to analyze the influencing factors of harmonic coupling in MMC, since harmonic coupling processes are complicated. In this article, the mechanism of harmonic coupling of the MMC is analyzed first, considering that harmonics exist in the grid and dc side. The influencing factors of harmonic coupling are analyzed based on the harmonic coupling. The reference for the filter and MMC design, and the evaluation of the harmonic pollution can be provided by the analysis in this article. The correctness of the influencing factors has been proved by simulation and experimental tests. [ABSTRACT FROM AUTHOR]

Providing a sinusoidal line current with few low-order harmonics is important for power converters. First, the influence mechanisms of multifactors for the line current distortion in single-phase three-level neutral point clamped converters are analyzed in theory. Second, the corresponding compensation methods for various factors are discussed, respectively. Particularly, the phenomenon that deadtime effects on harmonics is revealed by the theoretical derivation of Fourier series, and a corresponding quantitative calculation method is proposed and used to solve the compensation component of the deadtime delay. The detailed and strict mathematical deduction provides an alternative theoretical system for the quantitative analysis and compensation of deadtime and forward voltage drops effects. As for the component to compensate the unsteady forward voltage drops, it is online computation with current variations. Then, a comprehensive distortion compensation method by injecting offset voltage in the modulated signal is proposed to improve the line current waveform quality. Finally, simulation results verify the correctness of the quantitative calculation of deadtime effect on harmonics, and experimental tests verify that the proposed method can effectively reduce total harmonic distortion and improve waveform quality of the line current. [ABSTRACT FROM PUBLISHER]

A significant problem of three‐level neutral point clamped converters is the fluctuation of the neutral point voltage. A space vector pulse width modulation (SVPWM) strategy with neutral point voltage balancing for single‐phase three‐level converters adopted widely in railway traction drive system is proposed in this study. The relationship between the adopted SVPWM and carrier‐based pulse width modulation (CBPWM) with an offset voltage injection (OVI) is analysed in details. Theoretical analysis shows that the adopted SVPWM is a special type of CBPWM‐OVI methods, and can balance the neutral point voltage effectively. The high‐order harmonics of the line current distribute around twice switching frequencies while the SVPWM algorithm is adopted. These performances of the proposed SVPWM are verified by simulation and experimental tests. [ABSTRACT FROM AUTHOR]