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This paper experimentally demonstrates a methodology for proactive estimation of spatiotemporal variations in junction temperature of a silicon chip using multi-input multi-output (MIMO) thermal filters. The presented approach performs on-chip measurements to estimate the relations between power and temperature variations in the frequency domain to construct a MIMO thermal filter. The extracted filter is then used to predict spatiotemporal temperature variations from a known power pattern, even for locations without temperature sensors. The accuracy of the proposed approach is verified through a thermal emulator designed in 130-nm CMOS technology with on-chip digitally controllable power (heat) generators and temperature sensors. Using the proposed MIMO thermal filter, spatiotemporal temperature variations are accurately estimated with small error bound even at locations with no temperature sensors. [ABSTRACT FROM PUBLISHER]

Superlattice thin-film thermoelectric coolers (TECs) are emerging as a promising technology for hot spot mitigation in microprocessors. This paper studies the prospect of on-demand cooling with advanced TECs integrated at the back of the heat spreader inside a package (integrated TEC). Using thermal compact models of the chip and package with integrated TECs, the control principles for TEC-assisted transient cooling are presented. The control principles are implemented in a 130-nm CMOS process and cosimulated with the thermal system to show their feasibility and energy overheads. The simulation results show potential for extending the time for which a chip and package can sustain a high power load. [ABSTRACT FROM AUTHOR]

Thermal system identification (TSI) is presented as a methodology to characterize and estimate the transient thermal field of a packaged IC for various workloads considering chip-to-chip variations in electrical and thermal properties. The time–frequency duality is used to identify the thermal system as a low-pass filter in frequency domain through on-line power/thermal measurements on a packaged IC. The identified characteristic system for an individual IC is used for on-line prediction of the transient thermal field of that specific IC for a power pattern. A test-chip, fabricated in 130-nm CMOS, demonstrates the effectiveness of TSI in post-silicon characterization and prediction of transient thermal field. The application TSI in thermal analysis of multicore processors is presented. [ABSTRACT FROM PUBLISHER]

This paper presents the effect of proactive spatiotemporal power multiplexing on the thermal field in many-core processors. Power multiplexing migrates the locations of active cores within a chip after each fixed time interval, referred to as the migration interval, to redistribute the generated heat and thereby reduce the peak temperature and spatial and temporal nonuniformity in the thermal field. Clock and supply gating is used to minimize the power of the deactivated cores. The control of the migration interval is studied considering a 256-core processor at the predictive 16-nm node to evaluate the conflicting impact of the migration interval on thermal field and system performance. [ABSTRACT FROM PUBLISHER]