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Oxide semiconductors are promising semiconducting materials for next‐generation thin‐film transistors (TFTs). The role of the cations should be considered in the design of oxide semiconductors suitable for various applications. Ga has been widely used as a carrier suppressor in oxide semiconductors; however, research has recently been conducted to replace it with Al, which is cheaper and forms a stronger bond with O. Deposition using plasma‐enhanced atomic layer deposition (PEALD) is very useful for controlling the composition of the cations in an oxide semiconductor. In this study, an InAlZnO (IAZO) semiconductor was deposited using super‐cycle PEALD for the first time. Al2O3 (AO), AlZnO (AZO), and InAlO (IAO) as Al doping layers in IAZO are evaluated. Considering its electrical characteristics and stability, AZO is selected as the optimal Al doping layer. The IAZO thin film and TFT characteristics according to the Al doping method are examined through the role of the cations and H concentration. In addition, the Al concentration is controlled by adjusting the number of cycles in super‐cycle PEALD. As the Al concentration decreased, the mobility increased; however, the stability degraded significantly, which is induced by the increase in oxygen vacancies. Finally, the high‐Al IAZO system using AZO successfully showed overall excellent properties including mobility over 10 cm2 V−1 s, and outstanding stability under 0.1 V, which are greatly improved compared to previously reported IAZO TFTs. [ABSTRACT FROM AUTHOR]

Channel-shortening effect (CSE) in oxide thin film transistors (TFTs) is a crucial issue that must be resolved for applications in ultra-high-resolution displays. One of the origins of the CSE is the diffusion of a shallow donor such as hydrogen from other layers into the channel. In this study, we investigated for the first time the CSE of self-aligned Al-doped In-Sn-Zn-O (Al-ITZO) TFTs with planar and trench structures. The TFTs with planar structures exhibited severe negative $\text{V}_{ {{ON}}}$ shifts after an annealing process, whereas the TFTs with trench structures were barely affected, thereby exhibiting excellent ON/ OFF characteristics. The vertical channel in the trench TFT had higher resistance than the horizontal channel because of a back-sidewall roughness and thin channel. The high resistance of vertical channels played a significant role in determining the ON/ OFF characteristics of Al-ITZO TFT, where $\text{V}_{ {{ON}}}$ remained constant until the diffused shallow donors made the resistive vertical channels become conductive. Based on these unique operation characteristics, the suppression of CSE in a trench TFT was demonstrated even under a high annealing temperature. Trench TFT exhibited higher mobility, higher drain currents, and higher stability than planar TFT, thus making it suitable for ultra-high-resolution displays. [ABSTRACT FROM AUTHOR]

The attachment of display devices to various objects has attracted much attention due to their ability to present visual information to people in different environments. Such devices should be ultrathin to ensure complete coverage when attached to various objects, making them a critical technology for the development of rollable and stretchable displays. In this study, the fabrication of high‐performance ultrathin oxide thin‐film transistors (TFTs) on a 5 µm‐thick polyethylene terephthalate substrate is demonstrated by the method of delamination and transfer. Molybdenum oxide functions as an exfoliation layer, and the ultrathin devices exhibit full coverage on various objects with complex surface profiles such as contact lens, fabric, and human skin. It is notable that the TFT device exhibits a high optical transparency of greater than 81% and a reasonable electrical performance with a high mobility of 37 cm2 V−1 s−1. Since the oxide TFTs are fabricated without temperature limitations, the devices show reliable electrical performances under gate and illumination stresses. The flexible devices also exhibit excellent transfer characteristics in the bending state, regardless of the bending radius and direction, as well as a high mechanical durability of over 10 000 bending cycles with the bending radius of 3 mm. [ABSTRACT FROM AUTHOR]

• Atomic layer deposition for multicomponent amorphous oxide semiconductors. • Sequential dosing metal precursors for multicomponent oxide semiconductors. • Oxide semiconductors maintained their amorphous phase with high indium composition. Atomic layer deposition (ALD) is a suitable method for depositing amorphous oxide semiconductors (AOSs) because it has the potential for achieving high performance in complex structures owing to its excellent step coverage and atomic-scale controllability. Multicomponent AOSs are typically deposited using the ALD with a super-cycle method. In this study, multicomponent AOSs, i.e., IZO, ITO, and ITZO, were deposited using ALD by employing a sequential dosing of metal precursors. Their compositions were adjusted by varying the dose time of the indium precursor. Subsequently, we applied the IZO, ITO, and ITZO films in thin-film transistors (TFTs), which demonstrated normal transfer characteristics. The TFT containing ITZO with 73.9 at% indium exhibited a turn-on voltage of −1.01 V, subthreshold swing of 0.09 V/dec, and field-effect mobility of 35.9 cm2/(V s). [ABSTRACT FROM AUTHOR]

We report how the intrinsic film stress of Mo source and drain (S/D) electrodes affects the electrical properties of Al doped InZnSnO thin-film transistors (TFTs). By controlling the Ar pressure during the sputtering process, Mo films with different film stresses (1948.2 MPa and 168.8 MPa) were formed. Two kinds of TFTs were fabricated applying these films as S/D electrodes. The TFTs made with the high-stress S/D showed linear mobility ($\mu _{\text {lin}}$) of 29.44 cm2/Vs and hysteresis of 3.39 V while the TFTs with the low-stress S/D showed $\mu _{\text {lin}}$ of 35.25 cm2 /Vs and hysteresis of 1.97 V. Under positive bias temperature stress (1 MV/cm, 60°C, 3600 s), $\text{V}_{\text {on}}$ was 4.48 V and 7.28 V for the TFTs with the low-stress S/D and high-stress S/D, respectively. X-ray photoelectron spectroscopy and finite element (FE) simulation results revealed that oxygen deficient sites in the active layer generated by the film stress of the Mo S/D induced degradation of the device characteristics. [ABSTRACT FROM AUTHOR]

We suggest functional passivation layers in the form of a distributed Bragg reflector (DBR) composed of ZnS and LiF for transparent thin-film transistors (TFTs) to improve the stability under negative bias illumination stress (NBIS). The luminous transmittance of the DBR was 82.0% when the number of dyads was 3.5, and the thicknesses of ZnS and LiF were 42 and 85 nm, respectively. We applied the DBR to TFTs based on amorphous indium-gallium-zinc oxide without the degradation of electrical performance, such as the mobility, ON–OFF ratio, subthreshold swing, and $V_{{\mathrm{\scriptscriptstyle ON}}}$ . The luminous transmittance of the TFT with the DBR was measured as 71.6%. $\Delta V_{{\mathrm{\scriptscriptstyle ON}}}$ of the TFT with the DBR was reduced to −1.119 V compared with that of the reference TFT, which is −3.261 V when a 1.25 MV/cm electric field was applied, and white light was illuminated during 3000 s. This confirms that the functional passivation layers suggested, in this paper, provide a solution to suppress the instability of TFTs in the NBIS and enhance the optical transmittance of transparent displays. [ABSTRACT FROM PUBLISHER]

We report the simultaneous improvements of the threshold voltage ( Vth) stabilities under the prolonged positive gate bias stress (PBS) and negative gate bias under illumination stress (NBIS) by employing the gate dielectric/channel interface engineering in the bottom-gate, DC-sputtered amorphous indium gallium zinc oxide (a-IGZO) thin-film transistors (TFT). In the interfacial region, a-IGZO is grown under the low oxygen partial pressure ( [ABSTRACT FROM AUTHOR]

Highlights: [•] In–Ga–Zn–O based oxide semiconductor thin-film transistors. [•] Systematic comparisons between the top- and bottom-gate structures. [•] Positive bias temperature stabilities and related mechanisms. [•] Proposal of promising device reliabilities for the top-gate IGZO TFTs. [•] Feasibility for the highly performance backplane devices for next-generation displays. [ABSTRACT FROM AUTHOR]

Abstract: We fabricated amorphous indium gallium zinc oxide thin film transistors (TFTs) in a top gate structure on a glass substrate. We investigated the effect of drain bias on the instability of the device. Although the device showed highly stable characteristics under both positive and negative gate bias stress, it showed significant degradation in the transfer characteristics under drain bias stress. The degradation phenomena are somewhat similar to those of negative gate bias illumination stress (NBIS). In the case of NBIS, degradation mechanisms have been confused between two kinds of illustrations, one of which is hole trapping in the gate insulator and the other is an increase of electron density in the active layer. Our experimental results revealed that the degradation mechanism of drain bias stress is closer to the latter mechanism of NBIS in amorphous oxide TFTs. [Copyright &y& Elsevier]

• High mobility (30 cm2/Vs) self-aligned oxide TFTs is introduced by applying Cu diffusion barriers. (Mo, Mo‒Ti, Mo‒Al) • The origin of the channel-shortening effect was observed. • Self-aligned oxide TFTs with Mo-Al alloy show highly stable characteristics against channel-shortening effect. ga1 Developing high-resolution displays to achieve realistic images have been in a great demand recently regardless of the display size. However, in the backplane technology, the channel-shortening effect is a serious obstacle in realizing oxide thin film transistors (TFTs) with short channel lengths. In this study, we investigated the channel-shortening effect of Al-doped InSnZnO (Al:ITZO) thin-film transistors (TFTs) with Mo and Mo-based alloy Cu diffusion barriers and proposed Mo‒Al alloy as a Cu diffusion barrier to effectively reduce the channel-shortening effect. The TFTs with the Mo (Cu diffusion barrier) exhibited negative V on shifts and a channel-shortening length (ΔL) of 3.52 µm at an annealing temperature of 290 °C, although no chemical reaction occurred at the Mo/Al:ITZO interfaces. In addition, the TFTs with the Mo‒Ti (Cu diffusion barrier) showed the largest ΔV on and ΔL values at various annealing temperatures. The material and electrical analysis results confirmed that the hydrogen diffusion from the source/drain region is the main cause of the channel-shortening effect. Thus, the TFTs with the Mo‒Al (Cu diffusion barrier) exhibited excellent characteristics against the channel-shortening effect by forming a uniform and thin Al 2 O 3 layer at the Mo‒Al/Al:ITZO interface and preventing the hydrogen diffusion. The ΔV on remained almost unchanged, and the ΔL was 1.61 µm up to an annealing temperature of 290 °C. This study suggests a highly beneficial method for producing oxide TFTs, while suppressing the channel-shortening effect by tailoring the interface between source/drain and active layer using an appropriate Cu diffusion electrode. [ABSTRACT FROM AUTHOR]