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Owing to global competition, integrated circuit (IC) design houses are facing challenges in the optimal use of capacity and resources to fulfill customer demands and maximize profit. A hybrid make-to-stock (MTS) and make-to-order (MTO) model is generally used. Wafer procurement is made according to customers’ long-term demand forecast based on MTS. Limited wafer fab resources and back-end capacity are first allocated to on-hand orders and then to forecast demand. In production planning, several factors need to be considered to determine the production quantity and inventory level, such as the material, capacity, substitute, technical constraint, and order tardiness. This study considers a typical multi-stage supply chain network of semiconductor back-end production with turnkey service for IC design houses. The objective is to maximize the total profit with the constraints of equipment capacity, the flexibility of substitutes, and the usage of the turnkey mode. The problem is formulated with a mixed-integer programming model and solved using two novel heuristic algorithms: a product-based decomposition (PD_SCP) with profit-based criteria and a Lagrangian decomposition combined with the product-based decomposition (LD-SCP) method. Using the LD-SCP algorithm takes a long time but results in a great solution. Sensitivity analysis is conducted to investigate the impact of different parameters on production cost and total profit. [ABSTRACT FROM AUTHOR]

In this study, a one transistor one resistor (1T1R) structure combining a fin‐like low‐temperature polycrystalline‐silicon (LTPS) transistor and a resistive random access memory (RRAM) is successfully fabricated. For the fin‐like LTPS transistor, both n‐type and p‐types show excellent electrical output characteristics. Fin‐like structure produces more stable output characteristics. Also, the forming and current–voltage (I–V) characteristics are measured in this study, and the RRAM exhibits a forming voltage of about −1.9 V. As for the I–V switching property, the devices are stable and show excellent performance, with the set and reset voltages showing only minimal change over 100 cycles. Moreover, combining the fin‐like LTPS transistor and RRAM into a 1T1R structure results in favorable operation over 100 cycles, with excellent retention and endurance. According to these results, RRAM can be successfully combined with a fin‐like LTPS transistor for application in current integrated circuit processes without difficulty. [ABSTRACT FROM AUTHOR]

In this paper, vanadium oxide (VOx) was chosen for the resistive switching layer in a typical resistive random access memory (RRAM) structure. During negative forming bias, we found an initial selector property. This indicates the presence of metal–insulator-transition characteristics in the VOx layer even without an annealing process. In order to study this phenomenon, material analyses were conducted, with results indicating that there are V-O stretching bonds and an oxide/vanadium ratio of nearly 2.2 (${O}/{V} = {2.2}$). In addition, the experimental results of the dc sweeping test indicated that off-state current gradually decreased after each cycle, meaning that the selectivity characteristics in the VOx selector could be improved. Endurance performance of our experimental devices reached 108, sufficient for integration with RRAM devices in a 1S1R array. To further investigate this special phenomenon, current fitting analysis and simulation analyses were conducted. The results of the fitting analysis indicated that the conduction mechanism for off-state current was Schottky emission and the Schottky distance increased with increasing numbers of cycles. In other words, oxide ions migrate toward the filament at low negative voltage during dc sweeping, causing the formation of VOx. Furthermore, the results of thermal field simulation analysis indicated that there is a thermal concentration effect in and around the filament. Thus, oxide ions more easily migrate toward the vanadium filament when a stronger electrical field is present around the filament during dc sweeping cycles. Finally, stable vanadium selector characteristics are obtained and a conduction filament behavior model is proposed. [ABSTRACT FROM AUTHOR]