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In order to working together with ARP module in TCP/IP stack and making sure the high speed of ARP module, in this paper, with hardware language VHDL we re-code the cache portion of ARP protocol. According to the functional requirements of ARP cache by system, we re-code it in Xilinx ISE7.ll intergration environment, and in the meantime we did the simulation test in ModelSim. The simulation test results indicate that the re-designed ARP cache drops down a lot of cost both in space and time. The success of re-design of ARP cache with VHDL, will improve a lot of ARP working efficiency and as results to improve the whole system working speed of TCP/IP stack.

The purpose of this article is to remove CPU from heavy services of protocol processing, and alleviate the bottlenecks of communication system to suit for the high speed network. Methodology-by analysis and design with Linux specialties binding to functions of ML403 development version, to code or modify portion of kernel code and use VHDL to design the hardware section. Result-by analysis the design requirements of TCP/IP offload, to simplify the protocol stack of TCP/IP, and finally to give out a ML403 based solution for TOE architecture design, to build a system experiment platform and last we draw some conclusions and some test results. Conclusion-Although the results show that the performance improving is not much, the simple success of test indicates that this solution is correct and has potential. It will contribute to the performance improvement of whole communication system and popularization to the TOE network card

Purpose: In order to alleviate the related CPU workload of processing protocol stack, recoding the ARP protocol from TCP/IP protocol stack with hardware language VHDL, and the end to implement it on hardware platform. Methodology: According to functions, separating ARP protocol into two functional modules, creating limited state machine respectively and programming, at last integrating them on Xilinx ISE7.1i integrated environment, to implement functional simulation separately on ModelSim SE 6.0C at the end. Results: Based on the simulation results data, re-design the ARP protocol model which can replace the related functions in TCP/IP protocol stack. Conclusion: The success of ARP protocol module redesign with VHDL language, will drive the development of off-load engine technologies of TCP/IP protocol. Of course it will bring a new development of network also. In the next few years, it will promote a rapid development hot spot of network communication.