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This article proposes an improved hybrid parallel compensator (IHPC) for enhancing the power transfer capability of a photovoltaic (PV) grid-connected inverter. A thyristor switched capacitor (TSC) module is used in series with a conventional inductive-coupling voltage source inverter to reduce the dc-link voltage. Under a low dc-link voltage, the voltage across the insulated gate bipolar transistor (IGBT) will also be low, which will reduce the voltage stress of the IGBT, thereby improving the reliability and reducing the loss of the voltage resource inverter. First, the mechanism of reactive compensation for improving the PV inverter power transmission capability is analyzed. Then, the circuit configuration and operating principle of the IHPC are introduced. After that, an optimal control strategy for the IHPC is proposed to address the resonance problem caused by the TSC connected in series with the L filter and to improve the compensation performance of the IHPC. Finally, the effectiveness of the proposed IHPC and the control method is validated by the simulation and experiments. The results show that the IHPC with optimal control strategy can achieve continuous reactive power compensation under a low dc-link voltage, thereby enhance PV power transfer capability. [ABSTRACT FROM AUTHOR]

Fault current-limiting dynamic voltage restorers (FCL-DVRs), also named as dual-functional DVRs, involving both the FCL and the voltage compensation (VC) function, have attracted more attention. However, in case of the FCL-DVR operating in VC mode, either the high capacity of storage system in the dc-link or the oversizing of power converter is needed, and in case of the FCL-DVR operating in FCL mode both the high dc-link voltage and the oversizing of power converter are needed. Thus, in order to overcome these drawbacks, an improved FCL-DVR, which consists of an LC filter coupled with series coupling capacitor (LCC) at the ac side, is proposed in this article. The improved FCL-DVR using energy-optimized control strategy can not only perform the dual functions well, but also achieve the capacity optimization of FCL-DVR key components. The operating principle and performance of the proposed FCL-DVR under FCL and VC mode are elaborated, respectively. The optimal design of LCC and selection of FCL branch are studied in detail to ensure high stability and reliability for the proposed FCL-DVR operating in both modes. The simulation and experimental results clearly validate the effectiveness of the proposed topology and method. [ABSTRACT FROM AUTHOR]

A three-phase four-wire inverter is highly suitable for low-voltage distributed grids owing to its zero sequence control; however, essential aspects of grid-following inverters during faults, such as the power oscillation control flexibility and power injection capability, are rarely discussed in detail. Thus, by introducing zero sequence instantaneous power into a four-wire system, this article proposes a flexible control strategy that enhances the power injection capability of the inverter in the photovoltaic generation system during asymmetrical grid faults. First, a generalized reference current generation with flexible control of positive, negative, zero sequence current (FPNZSC), and power oscillations is presented. Second, a maximum allowable power injection (MAPI) algorithm based on the actual value constraints of power oscillations and peak current is presented according to the requirement. The proposed MAPI-FPNZSC strategy further extends the existing fault ride through methods in three-wire inverter systems, which is also suitable for single line-to-ground and double line-to-ground faults and can be easily realized in the natural or stationary frame. The effectiveness of the proposed strategy is verified by comparing the provided three typical objectives with the traditional method, and tested in a real-time hardware-in-the loop experimental platform. [ABSTRACT FROM AUTHOR]

The instability issues of the three-phase grid-tied inverters are major concerns in the distributed generated systems. However, due to the coupling effects in dq frame, the instability mechanisms of the three-phase inverters have not yet been clearly revealed. This paper presents a divided dq small-signal model of the grid-tied inverter in dq frame. The specific expressions of a small-signal output admittance of the inverter are investigated based on the proposed model, which can reveal the influencing mechanism of coupling effects and phase-locked loop (PLL) on the stability of the inverter. Then, a stability analysis method based on the divided dq small-signal model is proposed, by which the procedure of checking the stability of the grid-tied inverters with strong/weak grid is executed step by step, and it could be helpful for the system parameters design. Furthermore, the stability of the multiparalleled inverter system is also studied, and it indicates that as the number of the paralleled inverters increases, the parameters of PLL could be adjusted for a stable operation. The theoretical stability analysis results are verified by simulations and experiments. [ABSTRACT FROM AUTHOR]

This paper presents a new multilevel cascaded-type dynamic voltage restorer (MCDVR) with a fault current-limiting function. This topology can operate in two operational modes: 1) a compensation mode for voltage fluctuations and unbalances and 2) short-circuit current-limiting mode. The current-limiting function of the MCDVR is performed by activating antiparallel thyristors during the short-circuit fault, and deactivating them during normal operation. The mathematical model of the MCDVR system is also established in this paper. The control scheme design and optimal parameter selection are outlined based on the detailed theoretical analysis of the converter. The transient states of the MCDVR in the compensation mode and current-limiting mode are also analyzed. Simulation results based on the PSCAD/EMTDC software, and experimental results on a laboratory setup help to validate the proposed topology and the theoretical analysis. [ABSTRACT FROM AUTHOR]

This paper proposes a new fault current limiting dynamic voltage restorer (FCL-DVR) concept. The new topology uses a crowbar bidirectional thyristor switch across the output terminals of a conventional back-to-back DVR. In the event of a load short, the DVR controller will deactivate the faulty phase of the DVR and activate its crowbar thyristor to insert the DVR filter reactor into the grid to limit the fault current. A fault condition is detected by sensing the load current and its rate of change. The FCL-DVR will operate with different protection strategies under different fault conditions. Design of the FCL-DVR involves selecting important parameters, such as DVR power rating, dc link voltage of the DVR, output filter reactors and capacitors, and grid-tied transformers is proposed. The design methodology of the proposed FCL-DVR is fully discussed based on power systems computer aided design (PSCAD)/electromagnetic transients including dc (EMTDC) simulation. A scaled-down experimental verification is also carried out. Both modeling and experimental results confirm the effectiveness of the new FCL-DVR concept for performing both voltage compensation and fault current limiting functions. [ABSTRACT FROM PUBLISHER]

In the single-phase photovoltaic (PV) grid-connected distributed generation (DG) system located at the end of the feeder, it is necessary to provide quickly active and reactive power to the local loads. In this paper, an improved reactive current detection and power control method are proposed to realize active power control and reactive power compensation. To detect quickly the loads reactive current, a fast reactive current detection method using the derivative and ip\!\!-\!\!iq algorithm is presented, and it can overcome the long delay in a conventional phase-shift method. In the inner current loop, the quasi-proportional-resonant (QPR) control method with grid voltage feed-forward is presented to control accurately the grid current with zero steady error, and to reduce the current distortion due to the frequency offset and distortion of the grid voltage. The inner loop stability is analyzed, and the proper parameters are selected. In the outer loop, proportional–integrator (PI) controller is applied to stabilize the dc-link voltage, and power feed-forward is introduced to speed up system response. Simulation and experimental results verified the validity of the proposed control method. [ABSTRACT FROM PUBLISHER]