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Superconducting digital pulse-conserving logic and Josephson static random access memory (JSRAM) memory together enable scalable circuits with energy efficiency 100× beyond leading-node CMOS. Circuit designs support high throughput and low latency when implemented in an advanced fabrication stack with high-critical-current-density Josephson junctions of 1000 μA/μm2. Pulse-conserving logic produces one single-flux-quantum output for each input and includes a three-input, three-output gate producing logical or3, majority3, and and3. Gate macros using dual-rail data encoding eliminate inversion latency and produce efficient implementations of all standard logic functions. A full adder using 70 Josephson junctions has a carry-out latency of 5 ps corresponding to an effective 12 levels of logic at 30 GHz. JSRAM memory uses single-flux-quantum signals throughout an active array to achieve throughput at the same clock rate as the logic. The unit cell has eight Josephson junctions, a signal propagation latency of 1 ps, and a footprint of 2 μm2. Projected density of JSRAM is 4 MB/cm2, and computational density of pulse-conserving logic is on par with leading node CMOS accounting for power densities and clock rates. [ABSTRACT FROM AUTHOR]

We present design, analysis and test of a superconducting microwave power divider for a new superconducting Reciprocal Quantum Logic (RQL). The RQL logic family, using combination of AC power and SFQ data encoding, allows scalable superconducting digital circuits with zero static power dissipation. The Wilkinson 1:8 power splitter/combiner based on \lambda/4 resonators has been analyzed for geometric series and maximum flat response. Simulated maximum flat response gives one octave of bandwidth with non-uniformity of the bias current distribution within \pm10%. This result is valid with up to 40 ps of electrical length mismatch in the power lines that is well within the requirements for complex circuits. We have experimentally confirmed correct operation of the divider/combiner in a frequency band 0-12 GHz in even mode. [ABSTRACT FROM AUTHOR]

High performance oversampling Delta-Sigma data converters require high clock rates and accurate feedback of the digital output to the analog regime. Superconductor modulators offer the unique advantages of clock rates in the tens-of-gigahertz, comparator switching energy below attoJoules, and quantum-ac. curate digital-to-analog feedback. We have designed a two-loop baseband modulator whose noise transfer function was calculated using a simple, linear circuit model. The circuit was fabricated in a commercial superconductor IC process with 4.5 kA-per-square cm Josephson junctions and 1.5 micron minimum feature size. The circuit was tested at a derated sample rate of 5 GHz. Measured signal-to-noise dynamic range was 81 dB over a 10 MHz band. Third-order intercept was measured to be +24 dBsat in two-tone test. The measured noise transfer function was in excel- lent agreement with our linear model. The linear model indicates that with appropriate parameter values, this family of modulators extrapolates to significantly higher performance. [ABSTRACT FROM AUTHOR]

Superconducting digital circuits based on Josephson junctions with amorphous niobium-silicon (a-NbSi) barriers have been designed, fabricated, and tested. Single-flux-quantum (SFQ) shift registers operated with ±30% bias margins, confirming junction reproducibility and uniformity. Static digital dividers operated up to 165 GHz for a single value of bias current, which was only marginally slower than circuits fabricated with externally shunted AlOx-barrier junctions having a comparable critical current density of 4.5 kA/cm2. In comparison, self-shunted a-NbSi junctions enabled a doubling in circuit density. This and their relatively thick 10 nm barriers could increase the yield of complex SFQ circuits. [ABSTRACT FROM AUTHOR]

The bit-error rate of the Josephson junction single-flux-quantum comparator was measured as a function of bias current offset, at clock rates up to 10 GHz. The bit-error rate versus offset is a smooth curve, measured over 16 decades of incidence, which linearly extrapolates to 10-49 for optimal bias. The lowest rate actually measured was 5×10-17, corresponding to 4 errors counted in 130 h. © 1996 American Institute of Physics. [ABSTRACT FROM AUTHOR]