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This study proposes a model of mobility and negative bias stress stability degradation mechanism of zinc oxynitride (ZnON) thin-film transistors (TFTs) with various anion compositions. The subgap density of states (DOS) for ZnON TFTs were extracted using monochromatic photonic capacitance–voltage measurement. The extracted subgap DOS indicated an additional nitrogen-related subgap peak was observed in ZnON TFTs with an excessive nitrogen condition, which might originate from a nitrogen divacancy formation. Furthermore, the shifted threshold voltage components after the bias stress test were quantitatively divided as subgap DOS and interface trapping.

Hardware-oriented neuromorphic computing is gaining great deal of interest for highly parallel data processing and superb energy efficiency, as the candidate for replacement of conventional von Neumann computing. In this work, a novel synaptic transistor constructing the neuromorphic system is proposed, fabricated, and characterized. Amorphous indium-gallium-zinc-oxide ( $\alpha $ -IGZO) and Al2O3 are introduced as the channel and gate dielectric materials, respectively. Along with the high functionality and low-temperature processing viability, geometric peculiarity featuring extended gate structure improves the performances of the proposed transistor as synaptic component in the neuromorphic system. The insight into the substantial effect of optimal device structure design on energy efficiency is highlighted.

In this letter, the effects of negative and positive bias stability with respect to the anion composition of Zn–O–N thin-film transistors were researched. In the positive bias stress tests, the threshold voltage shift was high for ZnON devices with high nitrogen composition. In contrast to this, the negative bias stress test results have smaller $\Delta ~\text{V}_{th}$ values when nitrogen composition in ZnON was low. This different degradation behavior of ZnON for thin-film transistors was analyzed by using the subgap density of states which were obtained from monochromatic photonic capacitance-voltage measurement.

Various memristor-based synaptic devices have been proposed for implementing a neuromorphic system. However, memristor devices typically suffer from various inherent problems such as nonlinearity a...

In this study, we demonstrate both of digital and analog memory operations in InGaZnO (IGZO) memristor devices by controlling the electrode materials for neuromorphic application. The switching properties of the devices are determined by the initial energy barrier characteristics between the metal electrodes and the IGZO switching layer. Digital switching characteristics are obtained after the forming process when Schottky junction occurs at both of top and bottom electrodes. On the other hands, analog resistive switching is achieved when Schottky and Ohmic junctions exist at each side because the applied voltage modulates the Schottky barrier height through the Ohmic contact. In addition, the weight-update properties of the devices are verified depending on identical and incremental pulse schemes. The incremental pulse trains improve the linearity and variation of weight modulation, leading to the stable learning characteristics of neuromorphic system in terms of pattern recognition with MNIST hand-written digit images.

We proposed a physical model for ink-jet printed polymeric thin-film transistors (PTFTs) all over the sub- and above-threshold regions by using an effective carrier density. The nonlinearity under the low lateral electric field in the printed thiophene PTFTs was reproduced by applying the back-to-back Schottky diode model based on simple Poole–Frenkel (PF) mobility formalism. The analytical ${I}{-}\!{V}$ model supplemented with ${C}{-}\!{V}$ model in a single framework was also verified by successfully reproducing the measured characteristics of TFTs with three different thiophene polymeric channel materials. Additionally, we applied the physics-based analytical model on the inkjet-printed PTFT-based inverter and confirmed that the proposed models could predict the inverter circuit characteristics of the gain and static noise margin (SNM) based on the physical parameters.

Accurate circuit simulation reflecting physical and electrical stress is of importance in indium gallium zinc oxide (IGZO)-based flexible electronics. In particular, appropriate modeling of threshold voltage (VT) changes in different bias and bending conditions is required for reliability-aware simulation in both device and circuit levels. Here, we present SPICE compatible compact modeling of IGZO transistors and inverters having an atomic layer deposition (ALD) Al2O3 gate insulator on a polyethylene terephthalate (PET) substrate. Specifically, the modeling was performed to predict the behavior of the circuit using stretched exponential function (SEF) in a bending radius of 10 mm and operating voltages ranging between 4 and 8 V. The simulation results of the IGZO circuits matched well with the measured values in various operating conditions. It is expected that the proposed method can be applied to process improvement or circuit design by predicting the direct current (DC) and alternating current (AC) responses of flexible IGZO circuits.

Carbon nanotubes (CNTs) and indium-gallium-zinc oxide (IGZO) have emerged as important materials for p-type and n-type thin-film transistors (TFTs), respectively, due to their high mobility, flexibility, and low fabrication temperature. However, fabricating sophisticated macroelectronic circuits operating in complementary mode is challenging using only a single material, because implementing n-type CNT TFTs and p-type IGZO TFTs is difficult. Therefore, hybrid complementary circuits integrated with p-type CNT TFTs and n-type IGZO TFTs have been demonstrated to combine the strength of each TFT. However, limited efforts have been devoted to optimizing the circuit performance by tuning the process conditions under which the percolated CNT network channel and IGZO channel are formed. In particular, the densities of CNTs in the network channel and the amount of oxygen vacancies in the IGZO channel can be simply adjusted, which are important in determining the electrical properties of each TFT. In this work, we systematically investigated the device and circuit performance by varying such conditions; hence, we confirmed the design features of each TFT that can be optimized to enhance the hybrid complementary circuits.

Two-dimensional (2D) van der Waals (vdW) materials have recently attracted considerable attention due to their excellent electrical and mechanical properties. TmPSx (where Tm = a transition metal), which is a new class of 2D vdW materials, is expected to show various physical phenomena depending on the Tm used. In this paper, the unprecedented synaptic behavior of a vertical Ag/CrPS4/Au capacitor structure, where CrPS4 is a single-crystalline 2D vdW layer, is reported. Multi-stable resistive states were obtained using an external voltage of less than 0.3 V. Both short-term plasticity and long-term potentiation were observed by controlling the interval of the external voltage pulse. Simple mechanical exfoliation was used to develop a synaptic device based on a very thin CrPS4 layer with a thickness of ~17 nm. Therefore, it was demonstrated that vertical Ag/CrPS4/Au capacitors could be promising inorganic synaptic devices compatible with next-generation, flexible neuromorphic technologies. A capacitor made of a chromium thiophosphate (CrPS4) layer sandwiched between a silver electrode and a gold electrode behaves like a synapse. A Korea-based team led by Bae Ho Park from Konkuk University, Seoul, peeled very thin, crystalline CrPS4 layers of different thicknesses from the bulk material and fabricated top and bottom electrodes to prepare a series of Ag/CrPS4/Au capacitors. Under electrical pulses of different amplitudes, durations and intervals, these structures mimicked short-term and long-term variations in synaptic strength—neural behaviors involved in learning and memory. The devices’ behavior is attributed to the electrochemically induced migration of silver ions across the CrPS4 layer, leading to the formation and rupture of a conducting filament between the electrodes. The Ag/CrPS4/Au structure is promising for computing technologies that imitate neural pathways in the nervous system. We suggest synaptic devices using cation migration along thickness direction in a new class of 2D layered materials. An electrochemically active metal, such as Ag and Cu, is used for the operation of the synaptic device and chromium thiophosphate (CrPS4) single crystal is used as an electrolyte material. Multi-stable resistive states, short-term plasticity, and long-term potentiation are observed by controlling external voltage pulse with height smaller than 0.3 V. Given that simple mechanical exfoliation can generate very thin CrPS4 layers, the vertical Ag/CrPS4/Au capacitor offers a promising inorganic synaptic device compatible with next-generation flexible neuromorphic technology.

In this study, we investigated how the structure and oxygen flow rate (OFR) during the sputter-deposition affects the photo-responses of amorphous indium-gallium-zinc-oxide (a-IGZO)-based photodetector devices. As the result of comparing three types of device structures with one another, which are a global Schottky diode, local Schottky diode, and thin-film transistor (TFT), the IGZO TFT with the gate pulse technique suppressing the persistent photoconductivity (PPC) is the most promising photodetector in terms of a high photo-sensitivity and uniform sensing characteristic. In order to analyze the IGZO TFT-based photodetectors more quantitatively, the time-evolution of sub-gap density-of-states (DOS) was directly observed under photo-illumination and consecutively during the PPC-compensating period with applying the gate pulse. It shows that the increased ionized oxygen vacancy (VO2+) defects under photo-illumination was fully recovered by the positive gate pulse and even overcompensated by additional electron trapping. Based on experimentally extracted sub-gap DOS, the origin on PPC was successfully decomposed into the hole trapping and the VO ionization. Although the VO ionization is enhanced in lower OFR (O-poor) device, the PPC becomes more severe in high OFR (O-rich) device because the hole trapping dominates the PPC in IGZO TFT under photo-illumination rather than the VO ionization and more abundant holes are trapped into gate insulator and/or interface in O-rich TFTs. Similarly, the electron trapping during the PPC-compensating period with applying the positive gate pulse becomes more prominent in O-rich TFTs. It is attributed to more hole/electron traps in the gate insulator and/or interface, which is associated with oxygen interstitials, or originates from the ion bombardment-related lower quality gate oxide in O-rich devices.

We report the effect of the oxygen content of the LaAlO3 layer on the synaptic behavior in the Pt/LaAlO3/Nb-doped SrTiO3 memristor for neuromorphic applications. As the oxygen-content decreases, the current becomes larger and the spike time-dependent plasticity (STDP) becomes less sensitive to the time difference between pre- and post-synaptic spike voltage. In addition, the conduction mechanism, which was found to be a combination of thermionic and Poole-Frenkel emissions, and the effect of oxygen content are explained in association with the oxygen vacancy in the LaAlO3 layer. The trade-off between large current and efficient STDP can be controlled by the oxygen content. Furthermore, the results of extracting the synaptic strength-based model parameters indicate that the Pt/LaAlO3/Nb-doped SrTiO3 shows the efficient STDP characteristics in comparison to previously reported memristor materials.

We propose a universal model for bias-stress (BS)-induced instability in the inkjet-printed carbon nanotube (CNT) networks used in field-effect transistors (FETs). By combining two experimental methods, i.e., a comparison between air and vacuum BS tests and interface trap extraction, BS instability is explained regardless of either the BS polarity or ambient condition, using a single platform constituted by four key factors: OH− adsorption/desorption followed by a change in carrier concentration, electron concentration in CNT channel corroborated with H2O/O2 molecules in ambient, charge trapping/detrapping, and interface trap generation. Under negative BS (NBS), the negative threshold voltage shift (ΔVT) is dominated by OH− desorption, which is followed by hole trapping in the interface and/or gate insulator. Under positive BS (PBS), the positive ΔVT is dominated by OH− adsorption, which is followed by electron trapping in the interface and/or gate insulator. This instability is compensated by interface trap extraction; PBS instability is slightly more complicated than NBS instability. Furthermore, our model is verified using device simulation, which gives insights on how much each mechanism contributes to BS instability. Our result is potentially useful for the design of highly stable CNT-based flexible circuits in the Internet of Things wearable healthcare era.

The transport and synaptic characteristics of the two-terminal Au/Ti/ amorphous Indium-Gallium-Zinc-Oxide (a-IGZO)/thin SiO2/p+-Si memristors based on the modulation of the Schottky barrier (SB) between the resistive switching (RS) oxide layer and the metal electrodes are investigated by modulating the oxygen content in the a-IGZO film with the emphasis on the mechanism that determines the boundary of the abrupt/gradual RS. It is found that a bimodal distribution of the effective SB height (&Phi, B) results from further reducing the top electrode voltage (VTE)-dependent Fermi-level (EF) followed by the generation of ionized oxygen vacancies (VO2+s). Based on the proposed model, the influences of the readout voltage, the oxygen content, the number of consecutive VTE sweeps on &Phi, B, and the memristor current are explained. In particular, the process of VO2+ generation followed by the &Phi, B lowering is gradual because increasing the VTE-dependent EF lowering followed by the VO2+ generation is self-limited by increasing the electron concentration-dependent EF heightening. Furthermore, we propose three operation regimes: the readout, the potentiation in gradual RS, and the abrupt RS. Our results prove that the Au/Ti/a-IGZO/SiO2/p+-Si memristors are promising for the monolithic integration of neuromorphic computing systems because the boundary between the gradual and abrupt RS can be controlled by modulating the SiO2 thickness and IGZO work function.

A SPICE compact model based on non-quasi statically updated Schottky barrier is proposed and demonstrated in an IGZO memristors with Pd/IGZO/Mo structure. Our model combines the thermionic emission-based conduction and the potentiation/depression based on the Schottky barrier height modulation resulting from the oxygen ion migration or the electron trapping/detrapping at separate interface between the metal electrode and the switching layer. A stretched exponential function is used for non-quasi static update of the Schottky barrier. Proposed model reproduces the time-varying current, the DC I-V, and potentiation/depression characteristics very well with concrete parameter-extracting procedure. Our result is potentially useful in the design of devices and circuits for the oxide memristor-based neuromorphic computing.

Flexible InGaZnO (IGZO) thin-film transistor (TFT) with Al 2 O 3 gate insulator (GI) which is deposited by low temperature (LT) atomic layer deposition (ALD) is proposed and its synaptic behavior and mechanical stability are demonstrated on a polyethylene terephthalate substrate. The change of threshold voltage under bending test is attributed to the generation of ionized oxygen vacancy resulting from the oxygen bond-breaking. In addition, the synaptic behavior is clearly observed and the convolutional neural network-based MNIST recognition rate of 87.2 % after 60,000 training is demonstrated by using the proposed IGZO TFTs. Stable synaptic behavior can be explained by the potentiation/depression pulse-dependent movement of hydrogens which the Al 2 O 3 GI contains during LT ALD. Furthermore, it is found that the synaptic weight can be controlled and optimized by changing the thickness of Al 2 O 3 GI.

In this study, we analyzed the threshold voltage shift characteristics of bottom-gate amorphous indium-gallium-zinc-oxide (IGZO) thin-film transistors (TFTs) under a wide range of positive stress voltages. We investigated four mechanisms: electron trapping at the gate insulator layer by a vertical electric field, electron trapping at the drain-side GI layer by hot-carrier injection, hole trapping at the source-side etch-stop layer by impact ionization, and donor-like state creation in the drain-side IGZO layer by a lateral electric field. To accurately analyze each mechanism, the local threshold voltages of the source and drain sides were measured by forward and reverse read-out. By using contour maps of the threshold voltage shift, we investigated which mechanism was dominant in various gate and drain stress voltage pairs. In addition, we investigated the effect of the oxygen content of the IGZO layer on the positive stress-induced threshold voltage shift. For oxygen-rich devices and oxygen-poor devices, the threshold voltage shift as well as the change in the density of states were analyzed.

The memristor ratioed logic (MRL)-based NAND operation is demonstrated using a combination of two Ag/ $\gamma $ -Fe2O3 nanoparticles assembly/Pt memristors in series with one CMOS inverter. This letter finds the MRL operational frequency to be restricted due to an inconsistency between SET and RESET and by an imbalance of the resistance between the two memristors. It is also shown that optical tuning resistance is a promising technique for use in improving the operational frequency of the MRL operation. MRL-based NAND logic demonstrated in this letter manifests itself as a potential candidate for memristor-based logic compatible with CMOS digital/analog circuitry.

In this work, a SPICE compact model of indium-gallium-zinc oxide (IGZO) memristor in consideration of IGZO and electrode materials having non-quasi-statically updated Schottky barrier heights has been developed. In order for compact modeling of an analog memristor with higher accuracy, understanding of its switching characteristics and conduction behaviors needs to be preceded. It has been empirically revealed that they are dependent on metal species of the electrodes and processing approach. The switching characteristics are more weightedly determined by the interface between the switching layer and the metal with lower workfunction out of two electrode metals and interface status has been controlled by an Ar bombardment in this work. In order for identifying the conduction mechanism, a series of device simulations have been performed and the internal electric field distribution over the device structure has been closely investigated. It has been shown that the conduction behaviors are mainly determined by the thermionic emission taking place between Pd electrode and IGZO switching layer. For preparing the model parameters, along with the experimental results, transient measurement techniques have been cultivated at the same time, which has made possible to tell the difference between sets of model parameters obtained by theory and the techniques. In consequence, a highly reliable physics-based modeling for IGZO memristor has been developed through identification of switching and conduction mechanisms and extraction of the model parameters with the simultaneous help of Verilog-A equation build-up, which has demonstrated a plausible agreement with the measurement results.

Solution-processed carbon nanotubes (CNTs) have recently attracted significant attention as p-type thin-film transistor (TFT) channels due to their high carrier mobility, high uniformity, and low process temperature. However, implementing sophisticated macroelectronics with a combination of single CNT-TFTs has been challenging because it is difficult to fabricate n-type CNT-TFTs. Therefore, in combination with indium-gallium-zinc-oxide (IGZO), which has excellent electrical performance and has been commercialized as an n-type oxide TFT, we demonstrated various hybrid complementary metal-oxide semiconductor integrated circuits, such as inverters and nor and nand gates. This hybrid integration approach allows us to combine the strength of p-type CNT- and n-type IGZO-TFTs, thus offering a significant improvement for macroelectronic applications.

A new type of a Schottky diode based on a 99% semiconducting carbon nanotube (CNT) percolated network is demonstrated. The fabricated CNT Schottky diode shows excellent rectifying characteristics which are significantly modulated by the embedded control gate bias. In addition, we present integrated circuit applications of digital logic circuits (OR and AND gates) and an analog circuit (half-wave rectifier) with the fabricated CNT Schottky diode. The circuits show an accurate logic function and excellent rectification. Thus, we believe that our results represent an important step toward realizing circuits based on CNTs.

Positive bias stress-induced instability in amorphous indium-gallium-zinc-oxide (a-IGZO) bottom-gate thin-film transistors (TFTs) was investigated under high VGS/low VDS and low VGS/high VDS stress conditions through incorporating a forward/reverse VGS sweep and a low/high VDS readout conditions. Our results showed that the electron trapping into the gate insulator dominantly occurs when high VGS/low VDS stress is applied. On the other hand, when low VGS/high VDS stress is applied, it was found that holes are uniformly trapped into the etch stopper and electrons are locally trapped into the gate insulator simultaneously. During a recovery after the high VGS/low VDS stress, the trapped electrons were detrapped from the gate insulator. In the case of recovery after the low VGS/high VDS stress, it was observed that the electrons in the gate insulator diffuse to a direction toward the source electrode and the holes were detrapped to out of the etch stopper. Also, we found that the potential profile in the a-IGZO bottom-gate TFT becomes complicatedly modulated during the positive VGS/VDS stress and the recovery causing various threshold voltages and subthreshold swings under various read-out conditions, and this modulation needs to be fully considered in the design of oxide TFT-based active matrix organic light emitting diode display backplane.

We quantitatively investigated instability mechanisms under simultaneous positive gate and drain bias stress (SPGDBS) in self-aligned top-gate amorphous indium-zinc-oxide thin-film transistors. After SPGDBS (VGS=13 V and VDS=13 V), the parallel shift of the transfer curve into a negative VGS direction and the increase of on current were observed. In order to quantitatively analyze mechanisms of the SPGDBS-induced negative shift of threshold voltage (DVT), we experimentally extracted the density-of-state, and then analyzed by comparing and combining measurement data and TCAD simulation. As results, 19% and 81% of DVT were taken to the donor-state creation and the hole trapping, respectively. This donor-state seems to be doubly ionized oxygen vacancy (VO 2+ ). In addition, it

Persistent photoconduction (PPC) is a phenomenon that limits the application of oxide semiconductor thin-film transistors (TFTs) in optical sensor-embedded displays. In the present work, a study on zinc oxynitride (ZnON) semiconductor TFTs based on the combination of experimental results and device simulation is presented. Devices incorporating ZnON semiconductors exhibit negligible PPC effects compared with amorphous In-Ga-Zn-O (a-IGZO) TFTs, and the difference between the two types of materials are examined by monochromatic photonic C-V spectroscopy (MPCVS). The latter method allows the estimation of the density of subgap states in the semiconductor, which may account for the different behavior of ZnON and IGZO materials with respect to illumination and the associated PPC. In the case of a-IGZO TFTs, the oxygen flow rate during the sputter deposition of a-IGZO is found to influence the amount of PPC. Small oxygen flow rates result in pronounced PPC, and large densities of valence band tail (VBT) states are observed in the corresponding devices. This implies a dependence of PPC on the amount of oxygen vacancies (VO). On the other hand, ZnON has a smaller bandgap than a-IGZO and contains a smaller density of VBT states over the entire range of its bandgap energy. Here, the concept of activation energy window (AEW) is introduced to explain the occurrence of PPC effects by photoinduced electron doping, which is likely to be associated with the formation of peroxides in the semiconductor. The analytical methodology presented in this report accounts well for the reduction of PPC in ZnON TFTs, and provides a quantitative tool for the systematic development of phototransistors for optical sensor-embedded interactive displays.

We investigated the effect of simultaneous mechanical and electrical stress on the electrical characteristics of flexible indium-gallium-zinc oxide (IGZO) thin-film transistors (TFTs). The IGZO TFTs exhibited a threshold voltage shift (∆VTH) under an application of positive-bias-stress (PBS), with a turnaround behavior from the positive ∆VTH to the negative ∆VTH with an increase in the PBS application time, whether a mechanical stress is applied or not. However, the magnitudes of PBS-induced ∆VTH in both the positive and negative directions exhibited significantly larger values when a flexible IGZO TFT was under mechanical-bending stress than when it was at the flat state. The observed phenomena were possibly attributed to the mechanical stress-induced interface trap generation and the enhanced hydrogen diffusion from atomic layer deposition-grown Al2O3 to IGZO under mechanical-bending stress during PBS. The subgap density of states was extracted before and after an application of PBS under both mechanical stress conditions. The obtained results in this study provided potent evidence supporting the mechanism suggested to explain the PBS-induced larger ∆VTHs in both directions under mechanical-bending stress.

In this study, we implement an artificial synapse and neuron in a single platform by combining a silicon nanowire (SiNW) ion-sensitive field-effect transistor (ISFET), an indium-gallium-zinc-oxide (IGZO) memristor, and a voltage-controlled oscillator (VCO). The chemical and electrical operations of the synapse are emulated using the pH sensor operation of the ISFET and long-term potentiation/short-term plasticity of the IGZO memristor, respectively. The concentration of hydrogen ions in an electrolyte is successfully transformed via a VCO-based neuron into modulation of synaptic strength, i.e., the current of the memristor. It mimics the strength of the synaptic connection modulated by the concentration of the neurotransmitter. Thus, the chemical-electrical signal conversion in chemical synapses is clearly demonstrated. Furthermore, the proposed artificial platform can discriminate the chemical synapse from the electrical synapse and the path of the neuro-signal propagation and that of memorization/update of synaptic strength. This can potentially provide a new insight into the principles of brain-inspired computing that can overcome the bottleneck of the state-of-the-art von-Neumann computing systems.

The effect of direct current sputtering power of indium-gallium-zinc-oxide (IGZO) on the performance and stability of the corresponding thin-film transistor devices was studied. The field effect mobility increases as the IGZO sputter power increases, at the expense of device reliability under negative bias illumination stress (NBIS). Device simulation based on the extracted sub-gap density of states indicates that the field effect mobility is improved as a result of the number of acceptor-like states decreasing. The degradation by NBIS is suggested to be induced by the formation of peroxides in IGZO rather than charge trapping.