Search

As an effort toward a goal of monolithic optoelectronics for silicon (Si) chip-to-chip connections, we have fabricated organic light emitting diodes (LED's) using either heavily N-doped silicon (Si) as a cathode or P-doped Si as an anode. A thin silicon dioxide (SiO/sub 2/) layer, thermally grown on Si before deposition of a polymer or a molecular organic layer, enhances the electron injection into the semiconducting emissive layer. Without the thin oxide layer, no light was observed from LED's made from either (2-methoxy, 5-(2'-ethyl-hexoxy)-1, 4-phenylene vinylene) (MEH-PPV) or 8-hydroxyquinoline aluminum (Alq). With the SiO/sub 2/ layer,the internal quantum efficiencies as high as 0.02% and 0.5% have been observed for MEH-PPV and Alq, respectively, and the turn-on voltages were as low as 2.5 V and 8 V, again for MEH-PPV and Alq, respectively. From the LED response time measurement, we identified RC constant and the recombination time of transport-related traps as the speed limiting factors. >

An optimal device structure for integrating bipolar and CMOS is described. Process design and device performance are discussed. Both the vertical n-p-n and MOS devices have non-overlapping super self-aligned (NOVA) structures. The base-collector and source/drain junction capacitances are significantly reduced. This structure allows complete silicidation of active polysilicon electrodes, cutting down the parasitic resistances of source, drain, and extrinsic base. The critical gate and emitter regions are protected from direct reactive ion etching exposure and damage. All shallow junctions are contacted by polysilicon electrodes which suppress silicide-induced leakage. An arsenic buried layer minimizes collector resistance and collector-substrate capacitance. A novel selective epitaxy capping technique suppresses lateral autodoping from the arsenic buried layer. Fully recessed oxide with polysilicon buffer layer is used to achieve a low defect density device isolation. CMOS with L/sub eff/=1.1 mu m and W/sub n//W/sub p/=10 mu m/10 mu m exhibits averaged ring oscillator delay of 128 ps/stage. An n-p-n transistor with f/sub T/, of 14 GHz and low-power emitter-coupled logic ring oscillator with a delay of 97 ps/stage have been fabricated. >

An ultra-high-speed half-micron non-overlapped super self-aligned BiCMOS technology that uses a silicon fillet self-aligned contact technology (SIFT) for both bipolar and MOS transistors is discussed. The SIFT process reduces the device capacitances and series resistances by minimizing the diffusion region area as well as the polysilicon electrode area. Deep trench isolation for bipolar transistors allows the device area to be much reduced for VLSI applications. The ECL gate delay is demonstrated to be 31 ps for devices with emitter polysilicon widths of 0.6 mu m. The CMOS ring oscillator gate delays are 58 ps for 0.5- mu m gate length and 67 ps for 0.6- mu m gate length at 5 V. >

A one-mask metal-insulator-metal (MIM) capacitor using damascene Ca as the bottom electrode has been developed. Using a PECVD SiN as both the capacitor dielectric and the diffusion barrier for Cu we have demonstrated for the first time, the achieving of low leakage, high linearity MIM capacitors directly on Cu. The leakage and breakdown characteristics of the MIM capacitor depend strongly on both the surface conditions of the damascened Cu and on the PECVD SiN. We found that multilayered SiN is superior than single layer SiN, and Cu CMP plays an important role. However, the inevitable dishing on large area capacitors during Cu CMP shows little impact on the electrical characteristics.

We have integrated HfO/sub 2/ and Al/sub 2/O/sub 3/ gate dielectrics grown by atomic layer chemical vapor deposition (ALD) with poly-Si gate electrodes in the vertical replacement-gate (VRG) MOSFET geometry. These transistors are among the first reported with ALD HfO/sub 2/ gate dielectrics, and have HfO/sub 2/ target equivalent oxide thicknesses (tEOT's) down to 13 /spl Aring/. The poly-crystalline HfO/sub 2/ films in these VRG nMOSFETs exhibit extremely low gate leakage (GL) current densities of J/sub G/ /spl sim/ 10/sup -7/ A/cm/sup 2/ at V/sub G/-V/sub T,Long/ = 0.6 V for 15 /spl Aring/ tEOT devices. This indicates that amorphous gate dielectrics may not be necessary to meet GL requirements. HfO/sub 2/ devices with 50 nm gate length L/sub G/ exhibit drive currents [normalized by the coded width W/sub C/] of 490 /spl mu/A//spl mu/m for 1 V operation (overdrive V/sub GS/-V/sub T/ = 0.6 V) with good short-channel performance. These results demonstrate that ALD is compatible with the demanding VRG geometry, thereby illustrating that it should be well-suited to essentially any novel device structure built with Si-compatible materials.

The authors have developed digital confocal Raman microscopy. In this 3-dimensional technique, a stack of Raman images is taken at intervals of 0.1--2 microns through the depth of the sample. The point spread function of the microscope is then deconvolved from the images, to yield a stack of sharply depth-resolved images. A constrained iterative deconvolution, which is computationally expensive, is used. The technique efficiently uses the available laser power and makes confocal Raman imaging possible. The procedure has been used on a number of polymeric samples, including polystyrene beads and polyester gratings, and shown to work well. The computation time has recently been reduced from about 45 minutes to about 2 minutes, using a digital signal processor (DSP) instead of the CPU of the general purpose workstation previously employed. In collaboration with a major glass maker, the authors have recently employed confocal Raman microprobe spectroscopy and imaging to identify and image potassium sulfate and molecular sulfur inclusions in glass pellets. The authors have also used the Raman spectrum of water as a non-invasive temperature probe in operating electrophoresis capillaries. The paper also describes a simple macro-scale imager that was constructed, explorations of holographic optical elements, and a micron-diameter silver probe for obtaining micron-resolved surface-enhanced Raman spectra.

Confocal Raman microscopy was developed and used to study molecular sulfur inclusions in glass pellets. The Raman spectrum of water was used as a noninvasive temperature probe in operating electrophoresis capillaries. A macro-scale imager was used to image water Raman scattering using 30 mW 532 nm; it can be used to map boundaries, impurity distributions, and morphological changes in polymers and ceramics. A holographic beam splitter was obtained. Surface-enhanced Raman spectra was obtained from inside zebra fish embryos as a model system. Future research plans are given.

We have constructed a Hadamard transform Raman microscopic imaging system, and have developed it to a high definition (64K pixel) technique. We have demonstrated multispectral Raman imaging and developed the first three-dimensional (digital confocal) Raman imaging. We have explored the systematic errors in Hadamard multiplexing techniques and developed corrections. We have used our Raman microscope techniques to explore defect distributions on graphite electrodes and damage effects on SERS-activated silver electrodes. We have used the microprobe capabilities of our instrument to investigate the kinetics of polyacrylamide formation in electrolysis capabilities. We have worked closely with a manufacture of holographic displays to develop and incorporate holographic filters and holographic beam splitters into Raman spectrographs and microscopes. Finally, we have developed Hadamard multiplexing techniques for densitometric measurements of protein or nucleic acid blots.

We have constructed a Hadamard transform Raman microscopic imaging system, and have developed it to a high definition (64K pixel) technique. We have demonstrated multispectral Raman imaging and developed the first three-dimensional (digital confocal) Raman imaging. We have explored the systematic errors in Hadamard multiplexing techniques and developed corrections. We have used our Raman microscope techniques to explore defect distributions on graphite electrodes and damage effects on SERS-activated silver electrodes. We have used the microprobe capabilities of our instrument to investigate the kinetics of polyacrylamide formation in electrolysis capabilities. We have worked closely with a manufacture of holographic displays to develop and incorporate holographic filters and holographic beam splitters into Raman spectrographs and microscopes. Finally, we have developed Hadamard multiplexing techniques for densitometric measurements of protein or nucleic acid blots.

Summary form only given. Vertical doping engineering was used to implement deep-submicrometer Si MOS devices with excellent room-temperature turn-off and turn-on characteristics, circumventing the conventional scaling obstacles. The vertically engineered doping profile was realized using a 90-keV 1*10/sup 13/ cm/sup -2/ BF/sub 2//sup +/ implant for NMOS and a 100-keV 1*10/sup 13/ cm/sup -2/ As/sup +/ implant for PMOS, and minimal subsequent thermal treatment, for devices with 0.15- mu m minimum effective channel length, 4.0-nm thermally grown gate oxides, and self-aligned silicides on source, drain, and poly-gate. Room-temperature measurements show transconductances of 570/230 mu S/ mu m, threshold voltages of 0.45/-0.3 V, and subthreshold slopes of 84/88 mV/dec for NMOS/PMOS devices with a power supply voltage of 1.5 V. >