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Capacitor-current active damping has been widely used in voltage source inverters with LC or LCL filters. However, the time delay poses an adverse impact on the damping performance, causing a negative-resistance behavior, and thus constraints the system stability. To address this issue, this letter proposes a compensation method, which eliminates the adverse impact by removing the time delay out of the capacitor-current loop. Consequently, the damping performance behaves as a constant positive resistance, and thereby the stable region of the damping gain is notably enlarged. Experimental results verify the effectiveness of the proposed method.

For the two-stage single-phase power factor correction (PFC) converter, its instantaneous input power pulsates at twice the line frequency, generating the second harmonic current (SHC) at the dc-bus port. The dc–dc stage is used to regulate the output voltage or the dc bus voltage in different applications, and the SHC reduction schemes for the dc–dc stage with different control objectives are discussed in this article. When the dc–dc stage regulates the output voltage, it is pointed out that the control bandwidth of the dc–dc stage is required to be high enough and the dc bus capacitor should be large enough to suppress the SHC, and the design of the dc bus capacitor is given. When the dc–dc stage regulates the dc bus voltage, a virtual impedance is added in series with the input/output of the dc–dc stage to suppress the SHC, and a virtual impedance is added in parallel with the dc bus to improve the dynamic performance. The selection and design of the virtual impedances are also given. Based on that, three specific control schemes are proposed for the dc–dc stage to suppress the SHC, and the parameters design method is also presented. Finally, a 3.3-kW two-stage single-phase PFC converter is fabricated and tested in the lab to verify the effectiveness of the proposed SHC reduction schemes.

Due to the existence of grid impedance, there is coupling resonance problem which may cause the multi-inverter grid-connected system to become unstable. This article focuses on universal mechanism for multimodule grid-connected system composed of LCL -type inverters. By establishing the multi-input multi-output matrix of the multi-inverter system, the system stability is divided into two parts, i.e., the self-stability and the interactive-stability. Then, based on elaborate deduction for the interactive-stability, the equivalent allocation mechanism of grid impedance is raised and a stability criterion for multimodule inverters system is proposed. In addition, on the basis of exploring the effect of the digital-control delay on the stability of the multi-inverter system in the weak grid, the phase-lead compensator combining with the optimal capacitor-current-feedback coefficient is adopted to improve the system robustness against grid impedance variation. Finally, the effectiveness of the theoretical analysis is verified by experimental results.

Switching converters are the key parts of envelope tracking (ET) power supplies. To achieve a high tracking bandwidth, the ratio of the switching frequency over the envelope bandwidth is often far larger than 1. The pulse edge independent distribution (PEID) method can reduce this ratio to 1/ n ( n ∊ N ), significantly promoting the high-bandwidth tracking capability. However, multiple isolated voltage sources are required, leading to increased system complexity. Based on the PEID method, this article proposes a switched-capacitor ET power supply, which employs supplementary switches to flexibly link all the switched capacitors so that more charging loops are created and the relay charging mechanism is formed, which can equivalently extend the charging time and achieve more balanced voltage levels between the switched capacitors. Thus, with only one input, all the switched capacitors can maintain a stable and equal voltage and, thus, competently serve as the isolated voltage sources. To verify the proposed configuration and control method, a prototype with 2–27 V output voltage range, 54 W peak output power, and 10 MHz tracking bandwidth has been built and tested. The experimental results validate the proposed scheme.

The envelope tracking (ET) power supply can output a variable voltage which tracks the envelope of the radio frequency input signal to the power amplifier (PA), and the system efficiency can be significantly improved. To achieve a high tracking bandwidth, the switching frequency of the ET power supply is usually too high. The pulse edge independent distribution (PEID) method has been proposed to reduce the switching frequency to 1/ n ( n ∊ N) of the tracking bandwidth, but a large number of isolated voltage sources are needed, leading to increased power stage and system complexity. In this letter, a switched capacitor based high bandwidth ET power supply is proposed, which employs optimized charging topologies and mechanisms to stabilize the voltages across the switched capacitors, and thus they can fully replace the isolated voltage sources. Since the proposed configuration is derived from the PEID method, all the features of PEID method are retained. A prototype with 6−26-V output voltage and 20-W peak output power is fabricated and tested with a 1-MHz sine wave and a 5-MHz bandwidth communication envelope. The experimental results validate the proposed configuration.

Common-mode (CM) noise cancellation method is an attractive approach to reduce the original CM noise in power converters, which helps to shrink the size of electromagnetic interference filter. Traditional CM noise cancellation method cancels the CM noise current by adding a branch consisted of a compensation voltage source and a compensation capacitor, which generates a cancellation current and nullifies the noise current. As the duality, the voltage cancellation method is also feasible for reducing the CM noise, which has not been investigated in dc–dc converters. In this article, a common-mode voltage cancellation (CMVC) method is proposed, which cancels the CM voltage of the converter by inserting compensation voltage source into the input power cord. The requirement for achieving CMVC is that the cancellation voltage and the parasitic capacitances in the circuit are matched. The applications of CMVC method in basic nonisolated and isolated dc–dc converters are presented, and the considerations for practical applications of this method are discussed. Finally, a buck converter and a half-bridge LLC resonant converter prototype are built, and the proposed method is verified by experiment, respectively.

In a two-stage inverter, the instantaneous output power pulsates at twice the output frequency (2 f o), generating the second harmonic current (SHC), which will propagate into the front-end dc–dc converter. This article aims for suppressing the SHC in the front-end dc–dc converter with dc transformer (DCX)- LLC resonant converter. The small-signal model of the DCX- LLC resonant converter is proposed, and based on which, the unified small-signal model of the preregulator+ LLC converter is built. Then, the basic ideas for reducing the SHC are proposed, including the determination of the filter capacitors in the preregulator+ LLC converter and the control approach. After that, from a perspective of output impedance, the control schemes for reducing the SHC in the front-end preregulator+ LLC converter are proposed. By inserting a notch filter in the voltage loop and/or introducing a virtual impedance in series with the output rectifier of the LLC resonant converter, the output impedance of the preregulator+ LLC converter at 2 f o is increased and, thus, the SHC can be reduced. Finally, a 6-kVA two-stage three-phase inverter with boost+ LLC converter as the front-end dc–dc converter was fabricated and tested. The experimental results are provided to verify the proposed control schemes.

For the LCL -type grid-connected inverter, grid voltage full feedforward scheme is an effective method to improve the quality of the injected grid current. However, in the applications where a step-up transformer is adopted and its leakage inductance serves as the grid-side inductor, it is difficult to directly measure the grid voltage. For this case, the capacitor voltage full feedback scheme is proposed in this article to suppress the injected grid current distortion due to the grid voltage harmonics, and the full feedback function includes proportional, derivative, and second-derivative components. It is found that the derivative component counteracts the capacitor current feedback active damping, and both of them can be removed. Thus, the current sensor for sensing the capacitor current is saved. Instead, the LCL filter resonance is damped by the proportional and second-derivative feedback components, and a low-pass filter is added to the second-derivative component for ensuring a positive equivalent resistance within the full controllable frequency range. Experimental results from a 6-kW single-phase grid-connected inverter are provided to verify the effectiveness of the proposed method.

In a two-stage single-phase photovoltaic (PV) grid-connected inverter, the second harmonic current (SHC) in the PV panel will affect the maximum power point tracking operation and degrade the energy harvesting efficiency. In order to solve this problem, a flying capacitor clamped (FCC) boost three-level (TL) converter is adopted in this article, and the flying capacitor is employed to compensate the SHC for removing a large electrolytic capacitor. The propagation mechanism of the SHC is analyzed from the perspective of impedance, and a virtual impedance in parallel with the intermediate dc bus is introduced, achieving a perfect SHC compensation performance. The implementation of the virtual parallel impedance is illustrated, and the key parameters design of the FCC boost TL converter is given. A 3-kW two-stage single-phase PV grid-connected inverter is fabricated and tested, and the experimental results verify the validity of the theoretical analysis and the proposed control scheme.

Input-series-output-parallel (ISOP) converter system is suitable for high-input voltage applications owing to the reduced voltage stress of power switches. This article proposes an ISOP converter system with two-stage dc–dc converter as the basic module, which is composed by a non-isolated dc–dc converter and an isolated dc–dc converter. The isolated dc–dc converter functions as a dc transformer (DCX), and the non-isolated dc–dc converter serves as the pre- or post-regulator to regulate the output voltage. With this arrangement, a common duty ratio is applied to all the pre-or postregulators, and natural input-voltage sharing (IVS) and output-current sharing (OCS) can be achieved. The LLC resonant converter is adopted as the DCX, and the design considerations are given for achieving a nearly constant voltage gain even if there is parameters drift. Meanwhile, the non-isolated converter has simple topology and the parameters are easy to be identical. Thus, the proposed ISOP converter system realizes excellent IVS and OCS even the constituent modules are not well matched. Furthermore, the improved ISOP converter system employing boost+ LLC resonant converter is proposed. Two 12-kW ISOP converter systems have been fabricated and tested in the lab, and the experimental results are provided to verify the natural voltage sharing of the proposed ISOP converter system.

Both the capacitor-current-feedback (CCF) active damping and the point of common coupling (PCC) voltage feedforward can provide damping for the LCL -type grid-connected inverter. They are usually individually adopted, and negative damping will occur in a certain frequency range due to the digital control delay, leading to a nonminimum phase behavior. In this article, a hybrid active damping that combines the CCF and unit PCC voltage feedforward is studied. With properly designing the CCF gain, the positive damping range could sweep the entire frequency range with the variation of grid impedance. As a reward, the maximum profit of damping cooperation can be harvested, ensuring high robustness against both grid impedance variation and filter parameter fluctuation. The simulation and experimental results are provided to verify the effectiveness of the hybrid active damping.

The second harmonic current compensator (SHCC) can be added into the single-phase converters for compensating the second harmonic current (SHC) and thus removing the undesired electrolytic capacitor. In this paper, a virtual impedance, which is in the form of a capacitor and a resistor connected in parallel, is introduced to be in parallel at the bus-side port of the SHCC for effectively compensating the SHC while guaranteeing the system stability. This virtual parallel impedance is realized by feeding forward the bus-side port voltage of the SHCC, and thus the SHCC can be modular designed. The closed-loop parameter design of the SHCC is also presented. A 3.3-kW prototype of a two-stage single-phase power factor correction converter is built and tested in the laboratory, and the experimental results verify the effectiveness and feasibility of the proposed control method.

For the two-stage single-phase converter, including the power factor correction (PFC) ac-dc converter and dc-ac inverter, a second harmonic current compensator (SHCC) can be introduced to handle the second harmonic current (SHC) for removing the undesired electrolytic capacitor. Consequently, the two-stage single-phase converter becomes a multi-converter system. In this paper, the ac-dc stage or dc-ac stage in the system is categorized into two types in terms of the control objectives, i.e., the bus-voltage-controlled converter (BVCC) and the bus-current controlled converter (BCCC). The SHCC is a BCCC since its bus-port current is directly controlled, and the bus-port impedance of the SHCC is derived, which is affected by the ac-dc stage or dc-ac stage since the SHC reference is extracted from them. The system stability is investigated with the impedance-based stability criterion, and it is found that the system stability is different when the ac-dc stage or dc-ac stage is operated as a BVCC or a BCCC. Specifically, only when the ac-dc stage is operated as a BVCC, the system is unstable; while for other cases, the system is certainly stable. For the applications where the ac-dc stage is operated as a BVCC, a virtual resistor is introduced and realized by the control scheme of the SHCC to ensure the system stability. Finally, a two-stage single-phase PFC ac-dc converter is fabricated and tested to verify the theoretical analysis.

Switch-linear hybrid (SLH) envelope tracking (ET) power supply can achieve high efficiency and high tracking bandwidth simultaneously, and it has two typical forms, namely, series-form and parallel-form. In the series-form SLH ET power supply, the switched-mode converter is expected to output a continuous-wave voltage which can track the load voltage accurately to enhance the overall efficiency, and the buck converter with hysteresis voltage control (HVC) can be utilized. However, the output voltage of the buck converter will go over the hysteresis voltage boundaries, degrading the linearity and efficiency of the ET power supply. In this article, the hysteresis voltage prediction control (HVPC) is proposed to mitigate the problem in the HVC for buck converter. Moreover, in order to further increase the efficiency, the multilevel converter (MLC) is adopted instead of the buck converter for reducing the switching frequency and the inductor root-mean-square current, and the corresponding HVPC control strategy is also proposed. A prototype of the series-form SLH ET power supply employing the MLC with HVPC aimed at 5-MHz envelope signal is fabricated in the lab. The measured overall efficiency is 77.5%, a 12% efficiency improvement over that using step-wave switched-mode converter.

Recently, more occasions with high input voltage and/or high output voltage applications are emerging. However, the existing switching devices are limited by the voltage stress, e.g., the available maximum blocking voltage of insulated-gate bipolar transistors is 6.5 kV. Therefore, several methods are provided to solve this issue, including series connection of switches, multilevel converters, and modular series–parallel structures, where the modular series–parallel systems are the most popular choice due to the advantages of low cost, simple design process, high modularity, reliability, and redundancy. The main objective of series–parallel systems is to ensure the sharing of input/output voltage/current. Based on this, a comprehensive review on the available voltage/current sharing methods for series–parallel systems, which include input-series output-parallel, input-parallel output-series, and input-series output-series structures is provided in this article. Moreover, the relationships between the input voltage/current sharing and output voltage/current sharing of series–parallel systems are explained.

Input-series-output-parallel (ISOP) inverter system is very suitable for high dc input voltage and large ac output current power conversion applications. If this topology is applied to the grid-connected occasion, a bulky-capacity grid-connected inverter can be built with multiple small-capacity standardized inverter modules, which can significantly improve the reliability of the system operation and facilitate system design. In this paper, we investigate an ISOP LCL -type grid-connected inverter system, and put forward an optimized way for the topology of combined LCL filters first. Then, the inverter-side inductor current is carefully chosen as the controlled variable and thus a concise distributed control method is proposed to achieve multiple control objectives. On the basis of the presented distributed control, the redundant control technique is also provided to heighten the reliability of the grid-tied ISOP inverter indeed. Finally, a three-module prototype is built and the experimental results validate the effectiveness of the raised strategy.

Capacitor-current-feedback active damping has been widely used in LCL -type grid-connected inverters. However, the damping performance is deteriorated due to the negative equivalent resistance resulted by the digital control delays, and thus the grid-connected inverter is apt to be unstable under the grid impedance variation. To address this issue, this paper proposes the capacitor-current proportional-integral (PI) positive feedback active damping method that can ensure a positive equivalent resistance almost within the Nyquist frequency, i.e., the full controllable frequency range. In theory, the proposed damping method can be implemented by feeding back the capacitor current through a PI function. However, the integral term will continuously accumulate the noise and dc bias arising from the feedback signal. To overcome this drawback, a more practical implementation solution is drawn in this paper. Furthermore, a straightforward design procedure is presented for the convenience of selecting the proper controller parameters. With the proposed damping method and its practical implementation, high inverter robustness against the grid impedance variation can be achieved. Experiments are performed on a 6-kW prototype and the experimental results are in well agreement with the theoretical expectations.

The T/R module in the phased array radar is a pulsed power load that requires a constant voltage and pulsed current. Thus, the power supply of T/R module is a low-voltage low-frequency pulsed power supply (PPS). Traditionally, to provide the pulsed power, a very large storage capacitor is needed, which leads to large size and reduced power density. To reduce the storage capacitor, in this paper, a two-stage PPS with small capacitor and ultra-fast dynamic response is proposed. Two feedforward control loops imposing on the front-end and rear-end stages respectively are proposed to achieve the ultra-fast dynamic response. The design of the key components in the PPS is also introduced. Finally, a prototype with the peak output power of 2.8kW, the average output power of 840W, and the pulse repetitive frequency (PRF) of 100Hz is fabricated and tested in the laboratory. The experimental results are presented to verify the validity of the theoretical analysis.

With increased electric power replacing other secondary power in more electric aircraft (MEA), as a result, aircraft electrical power system (EPS) will face enormous challenges related to design optimization and system stability. This paper focuses on the modeling and impedance characteristics analysis of the three-stage DC generator in the 270V DC EPS for MEA, which is a critical factor in the system stability. The detailed model of the three-stage generator is derived based on the two-port network model. Then the characteristics of output impedance are analyzed and the influence of some factors including the DC-bus capacitor and control bandwidth on the output impedance is discussed. Some simulations are performed to verify the correctness of the theory.

The instantaneous input and output power of two-stage single-phase converter are imbalanced, resulting in the second harmonic current (SHC) in the dc–dc converter, dc source, or dc load. This paper revisits the SHC reduction control schemes from the dc-bus port-impedance perspective. The dc–dc converters in two-stage single-phase converters are categorized into two types, namely, bus-voltage-controlled converter (BVCC) and bus-current-controlled converter (BCCC). The dc-bus port impedance of the BVCC is revealed to be approximately inversely proportional to the voltage loop gain. Thus, for reducing the SHC in the BVCC, advanced control schemes are required for increasing the dc-bus port impedance. The dc-bus port impedance of the BCCC is proved to be a negative resistor within the control bandwidth. Hence, for reducing the SHC in the BCCC, the dc-bus voltage ripple should be limited. From the dc-bus port-impedance perspective, the SHC reduction control schemes are reclassified into closed-loop-design-based, virtual-impedance-based, and power-decoupling-based approaches, based on which, different SHC reduction control schemes are carefully reviewed and compared. Finally, potential challenges and issues are discussed.

The instantaneous output power of the two-stage single-phase grid-connected photovoltaic (PV) inverter pulsates at twice the line frequency ( $2f_{{\text{o}}}$ ), generating second harmonic current (SHC) in the front-end dc–dc converter and PV panel, which will affect the maximum power point tracking operation and deteriorate the overall conversion efficiency. The generating mechanism of the SHC is analyzed in this paper and it is pointed that in order to eliminate the SHC in the front-end dc–dc converter and PV panel, the voltage loop gain of the front-end dc–dc converter should be high enough at $2f_{{\text{o}}}$ . Since there is a −180° phase abrupt at the resonant frequency of the input side filter capacitor and the inductor, the system may be unstable. To cope with this problem, the inductor current feedback active-damping scheme (ADS) is adopted. For further improving the loop gain at $2f_{{\text{o}}}$ , proportional–integral–resonant regulator with ADS (PIR + ADS) is proposed in this paper. Besides, a step-by-step closed-loop parameters design method is presented. Finally, a 3-kW two-stage single-phase grid-connected PV inverter has been fabricated and tested, and the experimental results verify the feasibility of the proposed control schemes.

It is generally known that averaged models are inadequate in describing the effects of leading-edge and trailing-edge pulsewidth modulation (PWM) on the stability of dc–dc converters. In this paper, using discrete-time models of the buck, boost, and buck–boost converters and considering the effects of leading-edge and trailing-edge PWM, the general expressions of the duty-cycle-to-output-voltage transfer function, G vd( z ), in the discrete-time domain are derived. Based on the low-pass characteristics of the dc-dc converters and related properties of the matrix functions, approximate expressions of G vd in the frequency domain are derived, which are simple and accurate up to half the switching frequency. Using the approximate G vd, the stability of the three basic dc–dc converters under leading-edge and trailing-edge PWM is analyzed. It is shown that the stability of the buck converter is unaffected by the type of PWM, while the leading-edge modulated boost and buck–boost converters have better stability than the trailing-edge modulated ones. Since the trailing-edge modulation is commonly available in PWM controller integrated circuits, the modulation signal zero-order holding (ZOH) method and the inductor current feedback control method are proposed for use in the trailing-edge modulated boost and buck–boost converters to achieve the same effect of leading-edge modulated converters. Experimental buck and boost converters were constructed for verification of the accuracy of the proposed model and the validity of the proposed control schemes.

The three-phase four-wire inverter with split dc-link capacitors can supply unbalanced loads. For the purpose of reducing the filter inductors, a neutral inductor could be introduced into the neutral line. This paper analyzes the operation principle of the three-phase four-wire inverter with split dc-link capacitors when a neutral inductor is introduced. It is illustrated that the neutral inductor can reduce the zero-sequence switching harmonics in the voltages between the phase-leg midpoints and the output neutral point, thus the filter inductors can be reduced. The optimized design of the neutral inductor and filter inductors is proposed with the considerations of the inductor current ripple, the ability of supplying unbalanced loads, and the total energy stored in the inductors. The equivalent circuits of the three-phase four-wire inverter with split dc-link capacitors and neutral inductor is derived in the α–β–0 frame, and the zero-axis voltage regulator is modified to suppress the third-order harmonic in the zero-sequence current caused by the deadtime of the drive signals for the power switches. Finally, the experimental results from a 9-kW prototype are provided to prove the effectiveness of the proposed optimized design of the neutral inductor and filter inductors and the control strategy of the inverter.

In a dc pulsed power supply (PPS), its instantaneous output power is pulsed, and its input power is required to be constant. In order to balance the instantaneous power difference, a storage capacitor is usually connected to the output terminal of the PPS. However, the storage capacitor is extremely large when the pulse repetition frequency (PRF) is relatively low. In this paper, an active capacitor converter (ACC) is adopted in place of the storage capacitor. In the ACC, the storage capacitor is greatly reduced by intentionally increasing its voltage ripple. To improve the tracking ability of the terminal current of the ACC, a current reference feedforward control scheme is proposed, and it is further simplified for avoiding the use of the reciprocal and square root circuits. In order to improve the dynamic response of the PPS when the pulsed load is triggered on and terminated, several methods are proposed. The methods of imposing a negative dc bias on the current reference and peak voltage control for the ACC storage capacitor are aiming for reducing the undershoot and overshoot of the output voltage, and two fast voltage loops are incorporated for limiting the maximum and minimum voltage of the storage capacitor in the ACC. Finally, a prototype with the output peak power of 2 kW, the output average power of 300 W, and the PRF of 150–300 Hz is fabricated and tested to verify the validity of the proposed PPS and control schemes.

When a grid-connected inverter is connected to a weak grid, the system may be unstable. An active damper can be connected to the point of common coupling (PCC), which simulates a virtual resistor to dampen the resonance and thus stabilize the system. In this paper, an adaptive tuning method of the virtual resistor is proposed, which can automatically regulate the virtual resistor to the critical value to stabilize the system, and thus reduce the power loss. Furthermore, the active damper is designed not to respond to the dominant low-frequency harmonic components in the PCC voltage introduced by the grid background harmonics, so that its power loss can be further reduced. In order to make the active damper more accurately simulate the virtual resistor in a wide frequency range, a harmonic-current-reference compensation method is proposed. The prototypes of a 6-kW grid-connected inverter and a 1-kVA active damper are built and tested to verify the effectiveness of the proposed control scheme of the active damper.

Full-bridge (FB) converter is a widely adopted topology in medium-to-high power conversion applications, and soft switching can be realized with phase-shifted control to achieve high efficiency. As the diagonal switches turns on (off) at different time, the displacement current flowing through associated parasitic capacitances (including the transformer inter-winding capacitance and the parasitic capacitance between two midpoints and the ground) cannot be cancelled by each other, which makes the common-mode (CM) noise severe in phase-shifted full-bridge (PSFB) converter. In this paper, a CM voltage cancellation (CMVC) method is proposed, which is realized by inserting a cancellation voltage source into the input power cord, and canceling the CM noise. The cancellation voltage source is realized by CM winding, which is coupled with the CM voltage sensing winding connected between the middle of the transformer primary winding and the primary ground. By utilizing the magnetizing current through the CM voltage sensing winding, the load range for zero-voltage switching (ZVS) can also be extended by applying this method. The effectiveness of CMVC method has been verified by simulation.

The instantaneous output power of the two-stage single-phase inverter pulsates at twice the output voltage frequency. The second harmonic current compensator (SHCC) can eliminate the influence of the second harmonic current (SHC) in the front-end dc-dc converter and input dc source. Therefore, the capacitance of storage capacitor could be greatly reduced. This paper proposes to introduce a current reference compensation control scheme with repetitive control to improve the current compensation performance of SHCC. Finally, simulation tests on the system of a 3-kW SHCC are carried out to verify the effectiveness of the proposed control scheme.

The instantaneous unbalance power between the DC and AC side results in the second harmonic current (SHC) in the current of PV arrays, reducing the conversion efficiency of PV arrays. Several methods are used to compensate the SHC, but they inevitably reduce the power density. To solve this problem, a non-isolated Boost three-level (TL) converter is introduced as the front-end dc-dc converter, whose flying capacitor is used to absorb the SHC. In this paper, the SHC reducing method is proposed from the aspect of the power decoupling. It is pointed that the SHC can be provided by the intermediated bus capacitor and Boost TL converter. To ensure the flying capacitor absorb the SHC, the bus voltage and the input-voltage of the PV arrays should be controlled as a pure dc. Therefore the input-voltage loop gain of Boost TL converter and the bus voltage loop gain should be designed high enough at 2fo. Simulation results validate the analysis.

In high-voltage applications, conventional two-level dual-active-bridge (DAB) converter have to select high voltage switches to bear the input voltage, leading to high voltage stress and loss. In light of this, a multilevel hybrid dual-active bridge (MH-DAB) DC-DC converter for energy storage system is proposed, which is suitable for high voltage applications. The primary side of the proposed topology is a three-level four-switch half-bridge topology, which does not require any clamping diode or flying capacitor, and the secondary side is a two-level half-bridge. Furthermore, the control algorithm for MH-DAB is developed, where the pulse-width modulation (PWM) plus phase shift (PS) modulation scheme is applied to ensure a reliable power delivery, and meanwhile the two-cycle pulse-width modulation (TC-PWM) is proposed to balance DC-link capacitors voltage and the conduction loss. Finally, the effectiveness of the proposed MH-DAB converter is verified by simulation and experimental results.

Capacitor-current-feedback active damping (CCF AD) is widely applied to damp the LCL resonance peak. However, it suffers from the wide-range variation of grid impedance. To address this issue, a passivity-based CCF AD scheme is proposed in this paper, where the optimal CCF coefficient is analytically derived, avoiding the time-consuming interactions, and the computation delay elimination helps the inverter immune to filter parameters fluctuation. The superiority of the proposed design is confirmed by the experimental results.

Single-loop current control is an attractive scheme for the LCL -type grid-connected inverter due to its simplicity and low cost. However, conventional single-loop control schemes, which command either the inverter current or the grid current, are subject to the specific resonance frequency regions. The weighted average current control, which splits the filter capacitor into two parts (in form of an LCCL filter) and commands the current flowing between these two parts, is independent of the resonance frequency, but on the other hand, it is limited by the poor sensitivity to the grid impedance variation and weak stability in the grid current. These limitations are comprehensively explained in this paper and then addressed by identifying that the single-loop weighted average current control is equivalent to the dual-loop grid current control with an inherent capacitor current active damping. By tuning the capacitor split proportion as a second degree of freedom, an optimal damping performance that is robust to the grid impedance variation can be naturally achieved using only the inherent damping. Thus, no extra damping is required, and the single-loop structure with only one current sensing turns to be adequate. Moreover, for convenience of practical implementation, an improved LCCL filter configuration is proposed to allow the use of two equal nominal capacitances for the split capacitors. Finally, experiments are performed to verify the effectiveness of the proposed method.

The phase-shifted full-bridge (PSFB) converter has been widely used in medium-to-high power applications because of simple topology and ease of achieving soft-switching for power switches. However, with the phase-shifted control, the electric potential variation of the two phase-leg midpoints happens at different times, and the displacement current generated by two midpoints through associated parasitic capacitance (including the parasitic capacitance between two midpoints to ground and the transformer inter-winding capacitance) cannot be cancelled by each other, resulting in a serious common mode (CM) noise. Moreover, the resonant inductor voltage affects the electric potentials of the transformer terminals, which also generates CM noise. To reduce the CM noise in the PSFB converter, this paper proposes a symmetrical resonant inductor together with symmetrical transformer configuration to eliminate the influence of the resonant inductor voltage on the CM noise. Then, a passive cancellation circuit is introduced to cancel the effect of the voltages between the midpoints and the ground on the CM noise. A 1-kW PSFB converter prototype has been fabricated and tested in the lab, and the experimental results are provided to verify the proposed methods.

High-voltage direct current (HVdc) grid which incorporates multiple dc transmission lines will have extensive application since it has better operating flexibility and enhances the power trade. DC/DC converters are important components in the HVdc grid. The buck/boost modular multilevel dc/dc converter (MMDCC), which uses half-bridge submodules to reduce the voltage stresses across the power switches, is a good choice for the nonisolated applications in the HVdc grid. This paper proposes a pulse width modulation (PWM) control scheme for the buck/boost MMDCC, which uses much smaller submodule capacitors than those in the existing phase-shifted (PS) control scheme, thus reducing the converter volume and weight significantly. The operating principle of the proposed PWM control scheme is elaborated, along with the submodule capacitor voltage balancing strategy and the closed-loop control flowchart. Besides, the capacitance requirement of the buck/boost MMDCC in the PWM control scheme is calculated and compared to that in the PS control scheme, showing a dramatic reduction. The reason for the capacitance requirement difference of the two schemes is also explained. Simulation and experimental results validate the effectiveness of the proposed PWM control scheme and its ability to reduce the submodule capacitance.

The input power of the single-phase power factor correction ac–dc converter pulsates at twice the line frequency, while the output power of the single-phase dc–ac inverter pulsates at twice the output frequency. The pulsating power will result in second harmonic current (SHC) in the ac–dc converter and dc–ac inverter. In this paper, electrolytic capacitor-less second harmonic current compensator (SHCC) is presented to compensate the SHC. The SHCC has two operating modes, namely, charging mode and discharging mode. To achieve an excellent SHC compensation performance, a hybrid one-cycle control (OCC) is proposed to regulate the port current of the SHCC, and the SHCC can stably operate in both the charging mode and discharging mode. To avoid the mode detection required in the hybrid OCC and ensure seamless transition between the two modes, the OCC with dc bias is further proposed. Besides, a peak voltage control is proposed to regulate the storage capacitor voltage in the SHCC for reducing the power losses of the SHCC at light load. A 1-kW two-stage inverter with the SHCC is fabricated and tested, and the experimental results are provided to verify the effectiveness of the proposed control schemes.

For grid-connected power system based on photovoltaic (PV) source and fuel cells, high step-up and high-efficiency DC–DC converters are needed, due to the bus voltage of the grid-connected inverter is much higher than the output voltage of PV and fuel cells. In this paper, a novel high step-up converter is proposed. An auxiliary capacitor is introduced into the boost converter, which serves as a voltage source. It is in series with the input voltage source with the same voltage polarities. Thus, the input voltage is increased equivalently and the voltage gain is increased accordingly. To reduce the voltage stresses of the switch and the diode, multiple output capacitors are introduced. The voltage of each output capacitor is degraded leading to the reduced voltage stress. To replenish energy for the multiple output capacitors, a coupled inductor is adopted. Based on this, high step-up converter adopting auxiliary capacitor and coupled inductor is derived. The operating principles and voltage gain of the proposed converters are analyzed in this paper. In the end, experiment results are given to verify the theoretical analysis.

Light-emitting diode (LEDs) have a promising prospect because of its outstanding advantages: 1) long lifetime, 2) environmentally friendly, 3) flexibility of color mixing, 4) high illumination efficiency, etc. Based on the electrical characteristics of LEDs, a constant current driver is needed to support the LED working performance. With the wide applications of LEDs, many new technologies are presented. In this paper, advantages and disadvantages of different LED drivers are discussed. A detailed technology review is presented which is good for researchers and engineers to make right choices in design and selection of LED drivers.

For the LCL -type grid-connected inverter, there are basically three current control schemes, namely the grid current control, the inverter-side inductor current control, and the weighted average current control. This paper builds a general mathematical model to describe the three current control schemes. In this model, the grid current is an equivalent target control variable, the capacitor current feedback serves as a damping solution, and the computation and pulse-width modulation delays are taken into account. Based on the general mathematical model, a comparative analysis of different control schemes is carried out in terms of the grid current stability. It reveals that when the inverter-side inductor current is controlled, the grid current shows the same stability as the inverter-side inductor current; but when the weighted average current is controlled, both the grid current and the inverter-side inductor current are critically stable even though the weighted average current can be easily stabilized. Moreover, the general mathematical model also provides a unified perspective to design different control schemes, which makes the controller parameter tuning more straightforward and effective. In this way, a set of controller parameters which yields high robustness against the grid-impedance variation can be selected for all the three current control schemes. Finally, a 6-kW prototype is built, and experiments are performed to verify the theoretical analysis.

An independently controlled neutral module (ICNM) can be adopted in a three-phase four-wire inverter to form the neutral line and provide the path for zero-sequence current when the loads are unbalanced. The original control objective of the ICNM is to stabilize the neutral point voltage. Since there is a −180° phase jump at the resonant frequency of the neutral inductor and split dc-link capacitors in the system loop gain, system instability may occur. In order to ensure system stability, the inductor current feedback scheme (ICFS) can be incorporated, which is equivalent to introducing a resistor in series with the inductor branch. However, it will lead to increased zero-sequence current flowing through the dc-link capacitors, thus increasing the neutral point voltage ripple. In this paper, three improved control schemes, namely, notch-filter-incorporated inductor current feedback scheme (NF-ICFS), proportional resonant cascaded regulator plus inductor current feedback scheme (PR+ICFS), and neutral current feed-forward plus inductor current feedback scheme (NCFF+ICFS), are proposed, which not only ensure system stability, but also maintain a small neutral point voltage ripple. A 10-kW prototype of the three-phase four-wire inverter with ICNM is built and tested in the laboratory, and the experimental results verify the effectiveness of the proposed control schemes.

Previous work reveals that the magnetically coupled resonant (MCR) wireless power transfer (WPT) technology is efficient and practical for mid-range wireless energy transmission, able to handle nontrivial amount of power. This paper presented an equivalent analytical model for MCR WPT system to incorporate spatial misalignments between the transmitting coils and receiving coils. The mutual inductance formulas were derived when receiving coils are laterally, angularly or generally misaligned from transmitting coils. The relationship among the output power, transmission efficiency and the mutual inductance, load resistance were analyzed in detail. Experiments had also been carried out to facilitate quantitative comparison and validate the theoretical analysis.

Switch-linear hybrid (SLH) envelope tracking (ET) power supply has been widely used since it is featured with both high efficiency and wide bandwidth. In series-form SLH ET power supply, the power consumption of linear amplifier takes a huge part of the total power loss of the power supply. Therefore, the output voltage of switch-mode converter is expected to track the load voltage accurately. Hysteresis voltage control (HVC) is widely used due to its good robustness and fast dynamic response. However, the output voltage of switch-mode converter utilizing HVC will exceed the boundary of the hysteresis loop. This paper proposes a digitally-assisted hysteresis voltage prediction control to reduce the voltage scaling out the hysteresis border and further increase the efficiency of ET power supply. A prototype is built aiming for 5MHz tracking bandwidth, with 18W average output power. The experimental results verify the effectiveness of the proposed method.

In the cascaded inverter, the second-harmonic current (SHC) in the input of inverter penetrates into the front-end dc-dc converter, leading to a poor performance. In this paper, the pre-regulator+LLC converter, which shows superior performance in the applications with wide input voltage range, is employed as the front-end stage. Firstly, the boost converter is taken as the pre-regulator and the model of boost+LLC converter is proposed. Based on that, three approaches for SHC reduction are proposed from a point of output impedance, which are: 1) Reducing the filter capacitor of boost converter; 2) Introducing a notch filter in cascade with voltage regulator, 3) Adding a virtual impedance in series with the output rectifier of LLC resonant converter. Finally, a 6-kVA cascaded inverter is tested and experimental results are presented to verify the validity of the proposed methods.

This paper proposes a planar high voltage interleaved transformer design method. The transformer is suitable to be used in power supply for TWT. Since the parasitic parameters of the transformer are adopted as resonant elements, the cross regulation problem is alleviated. Moreover, the iteration of FEA simulation and circuits design will greatly reduce the cost of design. The method is verified by a 600W multiple output power supply for TWTA, and the performance of the prototype shows this method is effective.

When a grid-connected inverter is connected to a weak grid, the system may be instable. An adaptive active damper can be connected to the point of common coupling (PCC), which can automatically regulate a virtual resistor to the critical value to stabilize the system. Furthermore, a harmonic-current-reference compensation method is adopted to make the active damper more accurately simulate the virtual resistor in a wide frequency range. This paper investigates the harmonic-current-reference compensation for the stationary α−β frame, synchronous d−q frame, and decoupled synchronous d−q frame-controlled three-phase adaptive active damper. With the proposed method, the active damper controls the active and reactive power directly and improves the stability of the grid-connected inverters under weak grid at the same time. Simulation tests on the system of a 10-kVA three-phase grid-connected inverter and a 3-kVA active damper is carried out to verify the effectiveness of the proposed control scheme of the active damper.

This paper proposes a modular multilevel hybrid active bridge (MHAB) DC-DC converter, which is suitable for medium-voltage DC distribution grid. A modular structure and a conventional two-level half-bridge are employed in the medium-voltage (MV) and low-voltage (LV) sides of the proposed converter respectively, which is suitable for MV DC distribution grid, such as ±10 kV to 400 V. The system structure is analyzed and simplified. The pulse-width modulation (PWM) plus phase shift (PS) control strategy is applied to control the transferred power, and submodule DC-link capacitor voltage sorting method is adopted to balance the MV side submodule capacitor voltages. The effectiveness of the proposed MHAB converter is verified by simulation results.

Based on the requirements of power processing unit(PPU), this paper proposes a converter suitable for its wide input and wide output voltage range applications. The first stage adopts a four-switch Buck-Boost converter, which operates in two-mode state and can meet the request of wide input and wide output voltage range. At the same time, the interleaved parallel technology is used to reduce the inductor volume, so that the power density can be increased. The circuit topology of the second stage employs an LLC resonant converter. The LLC resonant converter operates in fixed frequency mode to obtain a stable voltage transfer ratio, which is similar to the DC transformer; the LLC resonant converter can achieve zero voltage turn-on of the primary side switches and zero current turn-off of the secondary side diodes, which can contribute to the increase of efficiency.

The concept of the virtual synchronous generator (VSG) is emerging as an attractive solution for controlling the grid-connected inverter when the renewable energy has a high penetration level into the grid. This paper focuses on the small-signal modeling and parameters design of the power loop of the VSG, and points out that the bandwidth of the power loop should be far less than twice the line frequency for the purpose of avoiding the VSG output voltage to be severely distorted. Consequently, the line-frequency-averaged small-signal model of the VSG is derived for system analysis and parameters design. Based on the model, the decoupling conditions between the active power loops (APLs) and the reactive power loops (RPLs) of the VSG are given. Finally, a step-by-step parameters design method is proposed to facilitate the design of the control parameters of the VSG. A 10-kVA prototype is built and tested in the laboratory, and the experimental results are given to verify the effectiveness of the theoretical analysis and the proposed parameters design method.

The interwinding capacitance of the transformer and the primary-side circuit nodes to ground capacitance are critical coupling path for common-mode (CM) noise in isolated power converters. In order to analyze the CM noise, the transformer interwinding capacitance is usually equivalent to lumped capacitance. In this paper, a generalized lumped capacitance model for constructing the CM noise equivalent circuit that is valid at low frequencies is derived. By simplifying the CM noise equivalent circuit based on Thevenin’s theorem, the equivalent noise source (ENS) for CM noise is proposed. The ENS is expressed by a linear combination of voltages in the converter, where the coefficients of these voltages are determined by transformer winding structure and the circuit configuration. With the help of ENS, the CM noise of the converter under different circuit configuration can be systematically analyzed and conveniently compared, which develops an effective reference for selecting a proper circuit configuration. Finally, the lumped capacitance model and the ENS for CM noise are verified by the experimental results.

High-voltage dc/dc converters play an important role in HVDC grids. Isolated modular dc/dc converters (IMDCCs) based on modular multilevel converter technology provide a good solution to high-voltage applications. In order to reduce the size of the system, the IMDCC is required to be operated with a high ac-link frequency, but this will lead to increased switching loss and thus degraded efficiency. This paper proposes a soft-switching operation scheme for such an IMDCC. In this scheme, a quasi-square-wave (QSW) modulation method is employed, where the chain-links generate quasi-square terminal voltages with reduced dv / dt . With such chain-link terminal voltages, the arm currents which provide good condition for the soft-switching operation of the QSW-IMDCC can be obtained. Since soft switching can be achieved for the power switches, the proposed scheme will suffer less switching loss, thus improving the efficiency of the converter. Moreover, a capacitor voltage-balancing control strategy is proposed. This strategy does not need any arm current sensors, thus reducing the cost. The proposed soft-switching operation scheme and capacitor voltage-balancing control strategy are verified by the simulation results.

The fourteen papers in this special section focus on high performance light emitting diode (LED) drivers. In recent years, as the fourth generation of light source, light-emitting diodes (LEDs) have been widely used in many applications such as street lighting, automotive, and residential lighting because of their long lifetime, low maintenance requirement, and environment friendliness. As the performance of LEDs will be influenced obviously by the drivers, researchers have shown a growing interest in optimizing the drivers. Although these problems such as current balancing, eliminating electrolytic capacitor, and improving the topologies are not new, the high-frequency high-efficiency trend of LED drivers has given rise to additional challenges. These papers provide an insight on some of the newly emerging challenges and potential solutions to overcome those issues.

Input-series-output-series (ISOS) inverter combined system is generally used in the occasion of high input and high output voltage. If the combined system topology is employed in the grid-connected application, multiple small-capacity standardized inverter modules could constitute a bulky-capacity grid-connected inverter system, which will effectively improve system reliability and facilitate system design. Nevertheless, for the sake of enhancing the system reliability authentically, distributed control and redundancy are urgently needed for the grid-tied ISOS inverter system. This paper firstly proposes a novel distributed control strategy to achieve multiple control objectives of grid-connected combined system, which includes power balance, suppression of resonance spikes, and high power factor of grid current. Then a hot plugging scheme dedicated to ISOS grid-connected inverter system is put forward to actualize redundancy. Meanwhile, the timing sequence is introduced. Finally, the prototypes are fabricated in the lab and the experimental results are exploited to verify the effectiveness of the proposed methods.