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The design of a very compact four quadrant CMOS analog multiplier is presented. The circuit has a very simple design, consisting of only four transistors and ten resistors, enabling a very small silicon area consumption. Furthermore, the multiplier can work in both subthreshold and saturation region, allowing it to operate over a wide range of frequencies. Subthreshold biasing sets the multiplier into a low-frequency low-power mode, while saturation biasing sets the multiplier to a high-frequency high-power mode. These two modes can be implemented for a very low voltage power supply. Finally, the proposed multiplier uses a minimum amount of nodes, allowing it to operate at high frequencies. Simulations show a maximum operating frequency of 300 kHz @ C L = 30 pF , a THD of ≈1% for an input sine wave of 100 mV and DC = 800 mV, and a minimum power supply of ( V DD - V SS ) ≈ 0.5 V when operating in the sub threshold region. In order to validate theory and simulations, a prototype of the proposed multiplier was fabricated using ON SEMI 0.5 μ m technology, showing its feasibility.

This work presents and validates the design of a four-quadrant analog multiplier based on the bulk-driven technique. Using the source–gate as well as the bulk–source voltages of a PMOS transistor as input ports, the multiplication task can be achieved. The AC signals are injected into the bulk terminals by means of a very-low-frequency programmable high-pass RC network which also serves to set its proper DC operation point. Although two RC networks are required, this multiplication cell is composed of only seven PMOS transistors and two coupling capacitors which makes it a very compact circuit. Furthermore, no preprocessed signals like the sum of $$\pm \,v_x \pm \,v_y$$ are required at the input ports. The implemented circuit shows a bandwidth of 50 MHz for an output capacitance of 40 pF and a THD lower than 1 $$\%$$ for gate/bulk input amplitudes below 0.2 Vp. The power consumption of the multiplication core is 660 $$\upmu $$ W and 2.6 mW including output buffers. In order to simulate and fabricate this circuit, an ON Semi 0.50 $$\upmu $$ m CMOS standard technology is used, showing a silicon area consumption of $$280\,\upmu \hbox {m} \times 400\,\upmu $$ m including output buffers. The proposed multiplier is suitable for biomedical, AM modulation, base-band modulation and analog computation.

This work presents the design of a current mode instrumentation amplifier (CMIA) based on the flipped voltage follower (FVF), used as a double current sense mechanism. Unlike current state of the art, the proposed CMIA senses the sourced and sank current of the voltage follower buffer inside the Op-Amp inputs. The FVF low-impedance input node allows to monitor the sink current provided by the low-impedance drain node of the active load in the voltage follower buffer. Proposed CMIA uses Split-Length compensated op-amps at the inputs, and Nulling-Resistor compensation technique is used at the output Op-Amp. The proposed CMIA is able to provide continuous programmable gains from 16 to 56 dB by adjusting $$R_2/R_1$$R2/R1 resistor ratios from 6.3 to 630 respectively. A gain-bandwidth product of 1.23 MHz and a common mode rejection ratio (CMRR) of 96 dB is obtained. A ?3 dB CMRR cutoff frequency of 115 Hz is observed in all gain cases. An overall CMIA power consumption of 315.5 µW is measured; 95 µA at ±1.65 V. The proposed CMIA was simulated and fabricated using 0.50 µm ON-Semiconductor CMOS standard technology.

This work presents a Cap-less Low-Drop Out (LDO) Voltage Regulator that uses a Bootstrap Flipped-Voltage Follower (B-FVF) as the input stage of its active compensation network. Previous works use active compensation networks whose frequency response shows a high-pass behavior that depends on their compensation capacitor Cf. The dominant pole is related to the value of Cf. By using the B-FVF, this Cf-pole dependency is broken; only the gain of the compensation loop lies on Cf, while the high-pass pole is referred to the B-FVF input node capacitance. This advantage allows the integration of a smaller Cf, a 10X reduction compared with the state-of-the-art, and easier placement of the high-pass pole to higher frequencies than the LDO open-loop Gain Bandwidth (GBW). The proposed LDO presents a quiescent current consumption of 95 μA at a 1.8 V input voltage, delivering a 0mA–50mA load current at a 1.6 V output voltage. A load and line transient responses of 133 mV and 165 mV were measured by using a Cf of only 0.3 pF and a load capacitor CL of 100 pF. In order to validate the proposed LDO, simulations and measurements were performed in 0.18 μm CMOS Standard technology. The silicon area consumption is 0.133 mm2.

This work presents a 910MHz/2.4GHz dual-band dipole antenna for Power Harvesting and/or Sensor Network applications whose main advantage lies on its easily tunable bands. Tunability is achieved via the low and high frequency dipole separation Wgap. This separation is used to increase or decrease the S11 magnitude of the required bands. Such tunability can be used to harvest energy in environments where the electric field strength of one carrier band is dominant over the other one, or in the case when both carriers have similar electric field strength. If the environment is crowed by 820MHz-1.02GHz carries Wgap is adjusted to 1mm in order to harvest/sense only the selected band; if the environment is full of 2.24GHz - 2.52 GHz carriers Wgap is set to 7mm. When Wgap is selected to 4mm both bands can be harvested/sensed. The proposed antenna works for UHF-RFID, GSM-840MHz, 3G-UMTS, Wi-Fi and Bluetooth standards. Simulations are carried out in Advanced Design System (ADS) Momentum using commercial FR4 printed circuit board specification.

Theft and exchange of newborns have rise its numbers becoming this topic a big issue that must be face up by hospitals. Closed Circuit Television (CCTV) surveillance is one of the most used solutions. However, CCTV needs human operator and a highly implementation cost. Ultra High Frequency Radio IDentification (UHF RFID) brings an easy and cheap solution to this problematic because of automatic real time control and monitoring of passive elements called tags. This work presents the design of two UHF RFID meander line antennas for newborn hospital monitoring applications. The first antenna is implemented on printed circuit board (PCB) obtaining a read range of 8.25m, a read range improvement of 2.25m is observed compared with commercially available passive systems. The second antenna is fabricated on Rogers Duroid 5880 flexible substrate allowing adhesion to any surface shape, a read range of 6m is obtained. Comercially available system used as reference is composed by a reader CSL 461 and passive tag Confidex Carrier. In order to illustrate this improvement, a monitoring system layout prototype is proposed. during its stay in maternity room. The identification, security and monitoring is a vital task and must be done with the most carefully methods. In order to prevent any mistake related with the new born, hospitals tie up a label in the newborn's arm or ankle with the mother's personal information, birthday and sex, (3). An exactly copy of the first label is also tied up to the mother's arm. A UHF RFID system can easily overcome these issues, moreover it can bring a set of new applications that may help hospitals to offer a more controlled and secured service for the newborn and relatives. It is planned to use a commercial RFID reader and its components, implementing the system and performing readings of commercial tags, later performing readings with antennas, which are designed using chip coupling and thus compare the read rates and observe the behavior of the proposed tags. The first section explains how a basic RFID system and its operation is understood. The second section discusses the general procedures to identify newborns, specifically in Mexico. In the following section, the considerations and factors for implementing an RFID system are specified. Details about the design of the antennas is presented in section four, as well as the tag proposed according to their reading ranges and it's behavior in an area of 20 square meters.