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Wide bandgap (WBG) devices offer the advantages of high frequency, high efficiency, and high power density to power converters due to their excellent performance. However, their low parasitic capacitance and fast switching speed also make them more susceptible to switching oscillations. The switching oscillations can cause voltage and current overshoots, shoot-through, electromagnetic interference, additional power loss, and even device damage, which can seriously affect the performance of power converters and systems. However, a comprehensive and in-depth overview is lacking on this topic. This article reviews the types, the causes and negative effects, the effects of parasitic parameters and suppression methods of these switching oscillations, which is helpful for practical engineering. First, the switching oscillations are divided into different types, and their causes and negative effects are reviewed. Then, the effects of different parasitic parameters on the switching oscillations are overviewed. It is found that due to the different physical structures of silicon carbide metal-oxide-semiconductor field-effect transistors, enhancement-mode gallium nitride high-electron mobility transistors (eGaN HEMTs), and cascode GaN HEMTs, the effects are also different. Finally, the main methods of suppressing the switching oscillations are summarized, and the advantages and disadvantages of these methods are presented. Furthermore, future research works on this topic and the conclusion of this paper are drawn, which will help readers deepen their understanding of the switching oscillations of WBG devices, and inspire readers to better use WBG devices for high-frequency and high-efficient power conversion. [ABSTRACT FROM AUTHOR]

Finding and replacing the defective insulated-gate bipolar transistor (IGBT) module timely by monitoring the ageing state of IGBT can improve the reliability of a power converter and reduce the loss caused by IGBT failure. A method for detecting the condition of bond wires in IGBT module by identifying the short-circuit current of IGBT module is presented in this paper. It is based on the fact that parasitic parameters of IGBT module are affected by the local damage induced by ageing over time, and these changes can be easily detected by monitoring the difference of short-circuit current. The study results indicate that short-circuit current of IGBT module decreases with module ageing over time, and the difference of short-circuit current caused by junction temperature is much smaller than that caused by bond wires fatigue on a specific gate driving voltage. Therefore, the IGBT module in the power converter can be diagnosed by detecting the difference of short-circuit current without considering the effects of junction temperature. Finally, a confirmatory experiment is carried out, and the correctness of the method proposed in this paper is verified. [ABSTRACT FROM AUTHOR]

Gate-oxide degradation has been one of the critical reliability concerns of silicon carbide (SiC) metal–oxide–semiconductor-field-effect transistors (mosfets), which could be monitored through aging-sensitive parameters. In this article, an online gate-oxide degradation monitoring method for planar SiC mosfets is proposed by extracting gate charge time at a specific range of gate voltage. It is based on the findings that the input capacitances of planar SiC mosfets change significantly over gate-oxide degradation, which is theoretically analyzed and experimentally verified. The capacitance variations are converted into the gate charge time as the new aging-sensitive parameter. The new parameter measurement circuit is proposed and integrated into the gate driver module. The article results indicate that the new parameter varies noticeably with gate-oxide degradation and the difference of this parameter caused by junction temperature is much smaller than that caused by degradation. Besides, the parameter is immune to package degradation and load current. The condition monitoring method can be implemented online since the parameter is extracted during the off-state of SiC mosfet devices, which does not affect normal operation. The confirmatory experiment is carried out to verify the correctness of the proposed method. [ABSTRACT FROM AUTHOR]

Gallium nitride (GaN) devices are widely used due to their excellent performance when integrated into power electronics applications. However, owing to their low parasitic parameters and fast switching speed, they are more prone to instability than the silicon devices. The sustained oscillation discussed in this article is one of the instability problems, which may result in overshoot or even more serious device breakdown; thus, it is pretty necessary to suppress it effectively in practical applications. It is the first time to adopt an RC snubber to suppress the sustained oscillation in this article, which is very simple and cheap but effective. First, the sustained oscillation modeling based on a double pulse circuit is carried out. Then, the RC region is established quantitatively according to the root locus analysis results, which makes up for the defects of these qualitative methods before. Furthermore, it is first found that the sustained oscillation can be fully suppressed due to the existence of dipoles. Finally, the oscillation suppression effect within the RC region is compared with that outside the region by the simulation and experimental results, which are consistent with the theoretical analysis. Additionally, the possible negative influence of the added RC snubber is also discussed in this article, which shows that it has a little impact on the switching speed and energy loss, while the sustained oscillation is well suppressed. [ABSTRACT FROM AUTHOR]

Monitoring the defective multichip insulated gate bipolar transistor (IGBT) module is a cost-effective approach to improve the quality of customer service. A method using time duration of the gate charge is proposed to monitor bond wires fatigue of the multichip IGBT modules when the modules are in the off-state. It is based on the fact that failure of the chip branch due to bond wires fatigue changes the gate input capacitance of the multichip IGBT module. The health state of bond wires can be converted into the change of time duration of gate charge under the constant gate current. A driver containing the constant current source is proposed. The study results indicate that the time duration of the gate charge decreases significantly when the failure of the chip branch occurs, and the effect of junction temperature can be ignored within the special range of gate voltage. Condition monitoring can be implemented during the off-state of the multichip module and without considering the effects of junction temperature. The confirmatory experiment is carried out to verify the correctness of the proposed method. [ABSTRACT FROM AUTHOR]

Low-voltage enhancement-mode gallium nitride high electron mobility transistors (eGaN HEMTs) are a kind of promising devices to realize high-efficiency and high-power-density conversion because of their fast switching speed, low conduction, and switching losses. Since the reverse conduction loss of eGaN HEMTs accounts for a large part of switching losses, it is of great importance to improve the traditional switching analytical model to predict the reverse conduction loss. In this paper, a complete and accurate switching analytical model of low-voltage eGaN HEMTs is presented, which considers the effects of low-parasitic inductances, nonlinear junction capacitances and nonlinear transconductances. The turn-on and turn-off switching processes are described in detail, and the resulting equations are solved by using mathematical software such as MATLAB to predict the switching waveforms during the switching periods. And an accurate loss calculation method based on the proposed model is proposed including the reverse conduction loss. The accuracy of the proposed model is validated by comparing the predicted switching waveforms and the efficiency of a synchronous buck converter with the experimental results, respectively. Moreover, the proposed model is compared with the traditional model, which proves the advantages of the proposed model. In the end, according to the proposed complete model, the effect of the top switch (TS) gate resistance, the TS drain-source capacitance, power loop inductance, current ripple, the bottom switch (BS) gate resistance, the BS drain-source capacitance, and dead time on the loss breakdown of the synchronous buck converter is explored and some qualitative suggestions are given to improve the conversion efficiency based on these analyzing results. [ABSTRACT FROM AUTHOR]