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Atomic layer deposition (ALD) has been studied extensively to employ oxide semiconductor thin film transistor (TFT) including both active layer and gate insulator (GI). Herein, we developed an ALD sandwich structure, which deposits both semiconductor and GI by ALD. In contrast to the previous results using sputter In-Ga-Zn-O (IGZO), ALD sandwich structure IGZO TFT exhibited severe deterioration in its electrical performance when the Al2O3 was adopted for both buffer layer and GI application. Through measurement of hydrogen permeability of ALD insulators and secondary ion mass spectroscopy of each sandwich structure after annealing, we found a hydrogen accumulation effect between Al2O3 and ALD IGZO interface layer, which caused deterioration of electrical performance. In contrast, TFTs with ALD SiO2, which has proper hydrogen diffusivity, chosen as the buffer and GI had favorable electric properties of 28.17 cm2/ $\text{V}\cdot \text{s}$ , 0.20 V/dec, 0.96, and 0.12 V for the mobility, ${V}_{\text {th}}$ , subthreshold swing (SS), and hysteresis. In this regard, an optimized GI structure via the ALD SiO2 and Al2O3 in situ process based on excellent interface formation with the semiconductor and hydrogen barrier performance, respectively, was developed. This functional GI structure consisting of SiO2 and Al2O3 exhibited excellent TFT characteristics (27.52 cm2/ $\text{V}\cdot \text{s}$ , 0.24 V/dec, and 1.07 V for the mobility, SS, and ${V}_{\text {th}}$ , respectively) with improved stability even after hydrogen annealing, which was used to examine the resistance to external hydrogen, showing a threshold voltage shift of −0.15 V and a SS shift of 0.01 V/dec. [ABSTRACT FROM AUTHOR]

The structural, chemical, and electrical properties of amorphous indium gallium zinc oxide (a-IGZO) films by magnetron sputtering and atomic layer deposition (ALD) were investigated where both a-IGZO films had a comparable cation composition. The ALD-derived a-IGZO film exhibited the higher atomic packing density, the effective suppression of trap-like oxygen vacancy defect (VO), and the enhancement in the hybridization of the sp orbital of In, Ga, and Zn cations compared to those of the sputtered a-IGZO film. Hence, a significant improvement in terms of the field-effect mobility was observed for the thin-film transistors with an In0.50Ga0.34Zn0.16O channel by ALD (36.6 cm $^{\textsf {2}}/\text{V}\cdot \text{s}$) compared to that of the sputtered In0.48Ga0.38Zn0.14O transistor (20.1 cm $^{\textsf {2}}/\text{V}\cdot \text{s}$); the ${I}_{\text {ON/OFF}}$ ratios for both were ~107. Simultaneously, the gate bias stress stability and photobias stress stability were also improved for the IGZO transistors with an ALD-derived channel, which can be explained by its reduced trap-like VO density. [ABSTRACT FROM AUTHOR]

We propose an experimental method to decompose the positive gate-bias stress (PBS)-induced threshold voltage shift ( \Delta V\mathsf {th}) of amorphous InGaZnO (a-IGZO) thin-film transistors (TFTs) into the contributions of distinct degradation mechanisms. Top-gate self-aligned coplanar structure TFTs are used for this letter. Stress-time-divided measurements, which combine the subgap density-of-states (DOS) extraction and the analysis on recovery characteristics, are performed to separate the \Delta V\mathsf {th} components. Change in excess oxygen ( \textO\mathsf {ex}) -related DOS is clearly observed, and \Delta V\mathsf {th} by PBS is quantitatively decomposed into the contributions of the active \textO\mathsf {ex} , and the deep and shallow gate insulator traps. The quantitative decomposition of PBS-induced \Delta V\mathsf {th} provides physical insight and key guidelines for PBS stability optimization of a-IGZO TFTs. [ABSTRACT FROM AUTHOR]

This paper examined the effects of postdeposition annealing on the electrical properties of titanium-capped (TC) indium–zinc oxide (IZO) films and their IZO thin-film transistors. The TC IZO transistor oxidized at the temperature of 300 °C exhibited a high field-effect mobility of 61.0 cm ^2 /Vs, low subthreshold gate swing of 110 mV/decade, Vth of −0.4 V, and high $I_{{\mathrm{{\scriptscriptstyle ON}}/\mathrm{{\scriptscriptstyle OFF}}}}$ ratio of 2.3 \times 10^{8} . In addition, the positive gate bias stress-induced stability of the TC IZO transistor was better than that of the control device without metal capping treatment. This was attributed to the scavenging effect of the loosely bonded oxygen species in the IZO semiconductor by titanium thermal oxidation. [ABSTRACT FROM AUTHOR]

We demonstrate top-gate and bottom-gate structures of amorphous indium–gallium–zinc-oxide thin-film transistors and compare their device operation. A replica material stack is fabricated for depth profile characterization to correlate with device results. We mainly focus on the oxygen content at the top and bottom. Key process factors that affect device reliability are determined based on material analysis, subgap density-of-states extraction by monochromatic photonic capacitance-voltage technique, and device simulations. We found that top-gate devices are influenced by higher deep acceptor-like states under positive gate bias-temperature stress, whereas the bottom-gate devices suffer reliability degradation under negative gate bias-temperature stress due to the decrease in oxygen content at the bottom interface. [ABSTRACT FROM AUTHOR]

We report that a pulsed negative bias stress slightly deteriorates the photoelectric stability of amorphous InGaZnO thin-film transistors, whereas a dc negative bias stress induces a large threshold voltage shift under the light. In the case of pulsed bias stresses, many of photoexcited positive charges might be recombined during the interval between pulses while those charges under dc bias drift to the channel interface without recombination. Interfacial trap density measurements explain the effects of such photoexcited positive charges on the interface. [ABSTRACT FROM AUTHOR]

A new level shifter employing indium–gallium–zinc–oxide thin-film transistor (IGZO TFT) for a display panel was proposed and successfully fabricated. Two clock signals with 180^\circ out of phase and a discharging TFT were employed to obtain a full-swing output. The IGZO level shifter has successfully exhibited a wide swing output from VDD to VSS without any additional power sources and input signals. The power consumption is 0.30 mW at a clock frequency of 12.5 kHz. The proposed level shifter with a depletion-mode device would be an important building block for an oxide TFT display. [ABSTRACT FROM AUTHOR]