Search

Soft-switching power converters based on wide-band-gap (WBG) transistors offer superior efficiency and power density advantages. However, at high frequencies, loss behavior varies significantly between different WBG technologies. This includes losses related to conduction and dynamic on-state resistance (RDS(ON)) degradation, also charging/discharging of input capacitance (CISS) and output capacitance (COSS). As datasheets lack such important information, we present measurement techniques and evaluation methods for soft-switching losses in WBG transistors which enable a detailed loss-breakdown analysis. We estimate the gate loss under soft-switching conditions using a simple small-signal measurement. Next, we use Sawyer–Tower and nonlinear resonance (NR) methods to measure large-signal COSS energy losses up to 40 MHz. Finally, we investigate the dependence of dynamic RDS(ON) degradation on off-state voltage using pulsed-IV measurements. We demonstrate an insightful comparison of soft-switching losses for various normally off gallium nitride (GaN) and silicon carbide (SiC) devices. A p-GaN-gated device exhibits the most severe RDS(ON) degradation and the lowest gate loss. Cascode arrangement increases threshold voltage for GaN devices and reduces gate losses in SiC transistors; however, it leads to higher C{OSS losses. The study facilitates the evaluation of system losses and selection of efficient WBG devices based on the trade-offs between various sources of losses at high frequencies. [ABSTRACT FROM AUTHOR]

We report the first demonstration of fully vertical power MOSFETs on 6.6- $\mu \text{m}$ -thick GaN, grown on a 6-inch Si substrate by metal-organic chemical vapor deposition. A robust fabrication method was developed based on a selective and local removal of the Si substrate as well as the resistive GaN buffer layers, followed by a conformal deposition of a 35- $\mu \text{m}$ -thick copper layer on the backside by electroplating, which provides excellent mechanical stability and electrical contact to the drain terminal. The fabrication process of the gate trench was optimized, improving considerably the effective mobility at the p-GaN channel and the output current of the devices. High-performance fully vertical GaN-on-Si MOSFETs are presented, with a low specific ON-resistance (${R}_{\textsf {on,sp}}$) of 5 $\text{m}\Omega $ cm2 and a high OFF-state breakdown voltage of 520 V. Our results reveal a major step toward the realization of high-performance GaN vertical power devices on cost-effective Si substrates. [ABSTRACT FROM AUTHOR]

Presents corrections to the above named paper. [ABSTRACT FROM AUTHOR]