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Random trapping and detrapping of charged carriers in the vicinity of gate oxide/Si interface has for long been considered as the dominant noise source in Si nanowire (SiNW) FET-based biochemical sensors. Here we extend our previous work presenting a Schottky junction tri-gate SiNWFETs (SJGFET) fabricated on a bonded silicon-on-insulator (SOI) substrate, aiming for ultra-low device noise generation. The SJGFET exhibits near-ideal gate coupling efficiency with a subthreshold swing of ~66 mV/dec. Its gate-referred voltage noise, Svg, are 1.2 × 10−10 and 1.1 × 10−11 V2 μm2/Hz at 1 and 10 Hz, respectively. These Svg values are significantly lower than that of previously reported FET-based sensors. More importantly, Svg of the SJGFET are below the reported voltage noise generated by the oxide/electrolyte sensing interface. Using our SJGFET as the signal transducer can greatly relieve the concern of the adverse effect from the intrinsic device noise in biochemical sensing applications. [ABSTRACT FROM AUTHOR]

Silicon nanowire (SiNW) field-effect transistors (SiNWFETs) are of great potential as a high-sensitivity charge sensor. The signal-to-noise ratio (SNR) of an SiNWFET sensor is ultimately limited by the intrinsic device noise generated by carrier trapping/detrapping processes at the gate oxide/silicon interface. This carrier trapping/detrapping-induced noise can be significantly reduced by replacing the noisy oxide/silicon interface with a Schottky junction gate (SJG) on the top of the SiNW. In this paper, we present a tri-SJG SiNWFET (Tri-SJGFET) with the SJG formed on both the top surface and the two sidewalls of the SiNW so as to enhance the gate control over the SiNW channel. Both experiment and simulation confirm that the additional sidewall gates in a narrow Tri-SJGFET indeed can confine the conduction path within the bulk of the SiNW channel away from the interfaces and significantly improve the immunity to the traps at the bottom buried oxide/silicon interface. Therefore, the optimal low-frequency noise performance can be achieved without the need for any substrate bias. This new gating structure holds promises for further development of robust SiNWFET-based charge sensors with low noise and low operation voltage. [ABSTRACT FROM AUTHOR]

Transistor amplification properties of a three-leg spirofluorene-based molecule are investigated, and the transistor is shown to possess usable current, voltage, and power gain. Current gain is facilitated since the source-drain legs are conjugated, whereas the gate (control) leg is unconjugated and spatially orthogonal, and voltage gain is enhanced by the efficient quantum-mechanical coupling to the gate. Full quantum-mechanical calculations were done for all three electrodes, using the density functional formalism and a plane-wave decomposition of the wave functions. [ABSTRACT FROM PUBLISHER]

It has recently been suggested that ferroelectric (FE) negative capacitance effects can be used to achieve steep subthreshold slope field-effect transistors, which are greatly desired for reducing energy consumption in modern digital electronics. Here, we propose that this concept can be improved by the introduction of a very thin metal or metal-like layer (a quantum metal) between the FE and the semiconductor channel. We show how to design this layer so that it attenuates the polarization charge of the FE, applying an appropriate charge to the semiconductor, while at the same time presenting a relatively constant capacitance to the FE layer, as is needed to stabilize the negative capacitance regime. For homogeneous polarization, we estimate that this device (a QMFeFET) can have extremely steep subthreshold characteristics (2 mV/decade over 11 decades) and that its energy and delay performance are advantageous. [ABSTRACT FROM AUTHOR]

The electrical characteristics of a heterojunction tunneling field-effect transistor (HETT), with a p-type \Si0.75\Ge0.25 source, have been measured as a function of strain. HETTs with channel transport and applied strain both in the [110] direction show a smooth monotonic change in drain current over a range of 0.09% compressive to 0.13% tensile strain. A measure \gamma = (d/d\ln JD)(d\ln JD/ds)\verts = 0 of the effect of strain s on tunneling current JD is proposed, which captures the dependence of the tunneling exponential argument on strain. An experimental value of \gamma = - \11.7 is extracted for the tensile case and compared to simulation results. We found theoretically that the value and sign of \gamma depend sensitively on the built-in strain at the Si–SiGe interface. [ABSTRACT FROM AUTHOR]