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The interplay of spin-transfer torque (STT) and spin-orbit torque (SOT) highlights the potential of current-induced magnetization reversal for the ultrahigh-speed and ultralow-power memory applications. However, the ultrafast field-free switching and its dynamic mechanism have not been clarified yet. Here, we experimentally demonstrate the sub-nanosecond field-free switching by the interplay of STT and SOT in perpendicular magnetic tunnel junctions (MTJs). The dynamic investigations of the STT and SOT switching reveal that the applied SOT current can highly decrease the incubation time and current density of STT, which leads to the achievement of ultra-fast switching. Besides, the timing scheme investigations of SOT and STT pulses are performed. The firstly applied SOT current further decreases the transition time of the magnetization switching, which could result from the different nucleation and motions of domains. The interplay and the timing operations of STT and SOT provide more flexible solutions for high-speed, large-scalability and energy efficient memory applications. [ABSTRACT FROM AUTHOR]

Current-induced magnetization switching is crucial in high-performance nonvolatile memory especially when the spin-transfer torque (STT) and spin-orbit torque (SOT) are employed in the mainstream magnetic random-access memory. However, in STT devices, the intrinsic mechanism leads to a long write latency, a low endurance, and a high-power consumption, while in SOT devices, a three-terminal structure is necessary to complete the read and write operations, causing a low space efficiency. In this work, we experimentally demonstrate a NAND-like spin-torque memory unit with the interplay of STT and SOT. The spin joint effect induced magnetic reversal is verified to be more energy-efficient and faster than that of STT. It also shows a great selectivity to ensure the reliability of the write operation. The memory unit, containing 8 magnetic tunnel junctions with a shared heavy-metal nanowire, is erased by a single SOT current and written by the combination of STT and SOT, showing the great potential for the high-density, ultrafast and energy efficient memory applications. [ABSTRACT FROM AUTHOR]

It has been demonstrated recently that field-free switching can be achieved by combining spin-orbit torque (SOT) and Dzyaloshinskii-Moriya interaction (DMI). However, this mechanism only occurs under certain conditions, which have not been well discussed. In this letter, we show that the ratio of the domain wall (DW) width to the nanodot diameter can be utilized as a criterion for determining these conditions. We have studied the influence of different magnetic parameters, such as the exchange constant, magnetic anisotropy, and the DMI magnitude. In addition, we have demonstrated the importance of decreasing the surface energy of the magnetic DW to allow the existence of metastable states. Our work provides guidelines for experiments on DMI-induced field-free magnetization switching, and it also offers a new approach to the design of SOT-based memory or logic circuits. [ABSTRACT FROM AUTHOR]

We propose a toggle spin torques magnetic random access memory (TST-MRAM) for ultrafast computing. The write operation of the TST-MRAM is achieved by applying two currents to the MTJ and a heavy metal layer, respectively, in a toggle-like manner. These two currents generate spin transfer torque (STT) and spin-orbit torque (SOT) to switch the magnetization. Thanks to the interplay effect between STT and SOT, low-energy and ultrafast write operation can be implemented without the need for the additional magnetic field. It is important to mention that both the amplitude and duration of the current flowing through the tunnel barrier can be decreased to enhance significantly the write endurance of the MTJ. The results demonstrate that the TST-MRAM is a good candidate for the upper-level caches, where the ultrafast operation and high write endurance are indispensable. [ABSTRACT FROM AUTHOR]

Ultrahigh-speed magnetization switching mechanism is strongly pursued, as it can improve the write performance of the magnetic random access memory (MRAM) and further extend the application area of spintronics. Currently, a well-studied switching mechanism is the spin transfer torque (STT), whose speed, however, is limited by an intrinsic incubation delay. Recently, spin–orbit torque (SOT) was proposed to solve the speed bottleneck of the STT. In this paper, we evaluate the potential of two types of SOT-MRAMs, whose data can be ultrafast written based on the recently discovered field-free SOT mechanisms, respectively. A cross-layer analysis is presented involving device modeling, circuit-level optimization, and architecture-level evaluation. First, the principle of the magnetization switching is analyzed with the macrospin simulation. Then, the optimization strategies at the circuit level are generalized through the SPICE-type simulation. Finally, we build up the memory architecture with the SOT-MRAMs, STT-MRAM, and static RAM. Their read/write performances are evaluated with NVSim software. It is demonstrated that one of the studied SOT-MRAMs shows the promising prospect in the non-volatile memory, especially suitable for high-capacity cache. [ABSTRACT FROM AUTHOR]

The conductivity of spin field-effect transistor (spin-FET) can be modulated by controlling the spin degree of freedom; therefore, emerging low-power applications can be explored. In this paper, we propose a novel device called multi-gate spin-FET where multi-gate voltages can successively modulate the spin of the electrons. Various logic functions can be implemented with multi-gate spin-FET by setting the appropriate channel lengths. First, we present an electrical model of the multi-gate spin-FET which considers the physical mechanisms and the fitting of experimental results. The availability of the electrical model is validated by the dc simulation. Afterward, typical logic circuits are designed with the multi-gate spin-FET, including NAND gate, XOR gate, full adder, and a representative three-input logic gate. Transient simulation results validate the functional behaviors of these logic circuits. Finally, based on an analysis of power consumption, we conclude that the multi-gate spin-FET is a more energy-efficient device compared with the conventional CMOS FET. [ABSTRACT FROM AUTHOR]

Spin-hall-assisted spin transfer torque (SHA-STT) can achieve high-speed, magnetic-field-free, and high-reliable magnetization switching in a three-terminal device consisting of magnetic tunnel junctions (MTJ) above a heavy-metal. Nowadays, the development of perpendicular magnetic anisotropy drives the continuous scaling of the MTJ. In addition, an asymmetric exchange interaction called Dzyaloshinskii–Moriya interaction (DMI) inevitably exists at the heavy metal/ferromagnet interface and has a considerable influence on the magnetization dynamics. Considering these factors, in this work, we study the scaling performance of the SHA-STT driven magnetization dynamics in the presence of DMI. Simulation results demonstrate that, for nonzero DMI, the magnetization switching is activated by domain nucleation, whose mechanism is strongly dependent on the MTJ size and DMI magnitude. The critical SHE current density for magnetization switching decreases with the enlarged MTJ or enhanced DMI. In the presence of DMI, the switching time decreases with the scaling of the MTJ. Moreover, compared with the case of zero DMI, the switching speed is improved or deteriorated for the weak or strong DMI, respectively. Our work demonstrates that the MTJ size and DMI magnitude should be optimized in order to achieve a good tradeoff among a set of performance metrics of the SHA-STT devices. [ABSTRACT FROM PUBLISHER]

Perpendicular-anisotropy magnetic tunnel junction (MTJ) is one of the most promising candidates to build hybrid logic-in-memory architecture, because of its nonvolatility, infinite endurance, and 3-D integration with a CMOS technology. A novel magnetic full-adder (MFA) based on this architecture is proposed, with MTJs switched by spin-Hall-assisted spin-transfer torque (STT). Owing to the assistance of spin-Hall effect (SHE), MTJ switching time can significantly be reduced, and high operation frequency can be achieved. Moreover, the endurance of oxide barrier is largely enhanced as the requirement of lower write voltage. Using an industrial CMOS 28 nm design kit and a physics-based three-terminal spin-Hall-assisted STT-MTJ model, functionality and performance of the proposed MFA have been simulated and validated. A 1 ns STT current pulse assisted by 0.35 ns SHE current pulse is sufficient to switch the MTJ configuration. When compared with the previous MFAs based on STT-MTJ, the proposed MFA achieves 38% less operation time and 31% less power consumption to perform read and write operations. [ABSTRACT FROM AUTHOR]

Currently double-interface magnetic tunnel junctions (MTJs) have been developed for enhancing the thermal stability barrier at the nanoscale technology node. Dzyaloshinskii–Moriya interaction (DMI) inevitably exists in such devices due to the use of the heavy-metal/ferromagnet structures. Previous studies have demonstrated the detrimental effect of DMI on the conventional single-interface spin-transfer torque (STT) MTJs. Here, in this work, we will prove that the detrimental effect of DMI could be almost eliminated in the double-interface STT-MTJ. This conclusion is attributed to the suppressing effect of Ruderman–Kittel–Kasuya–Yosida (RKKY) interaction on the DMI. Detailed mechanisms are analyzed based on the theoretical models and micromagnetic simulation results. Our work highlights the importance of appropriately controlling the DMI in the composite free layer of the double-interface STT-MTJ. [ABSTRACT FROM AUTHOR]