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This paper reports on a low-frequency vibrational piezoelectric energy harvester that scavenges energy from a wire carrying an ac current. The harvester is described, fabricated, and characterized. The device consists of a silicon cantilever with an integrated piezoelectric capacitor and a proof-mass that incorporates a permanent magnet. When brought close to an ac current carrying wire, the magnet couples to the ac magnetic field from a wire, causing the cantilever to vibrate and generate power. The device was fabricated from a silicon-on-insulator substrate using microelectromechanical systems (MEMS) technology. The charge generating capacitor uses a CMOS compatible aluminum nitride piezoelectric material and fabrication process. The device uses a commercial neodymium iron boron permanent magnet that is post-fabrication assembled with the device. The measured average power dissipated across an optimal load of 2 $\text{M}\Omega $ was $1.5~\mu \text{W}$ . This was obtained by exciting the device into mechanical resonance with a peak displacement of 3 mm using the electro-magnetic field from a 2-A source current. The measurements also reveal that the device’s electrical response is nonlinear due to mechanical nonlinearity of the device. In addition, bandwidth broadening by 250% is demonstrated by means of vibro-impact approach. [2016-0263]

Silicon carbide is a wide band gap semiconductor which presents excellent physical properties such as a high critical electric field strength which enables the realisation of efficient power devices [1]. The cubic silicon carbide (3C-SiC) polytype has been less investigated than the more popular hexagonal structure 4H-SiC. 3C-SiC has the advantage that it can be epitaxially grown on Si by chemical vapour deposition (CVD) [2] and presents properties suitable for achieving cost effective SiC power devices in the range 650V to 1200V. These 3C-SiC/Si substrates offer a promising alternative to the costly hexagonal SiC (4H-SiC) wafers and can also be used as template for the epitaxy of cubic GaN [3]. However, the presence of the Si substrate does limit the temperature available to anneal out the implantation damage generated by some device processing sequences. This work investigates the properties of metal silicides as a potential Schottky contacts for high blocking voltage 3C-SiC/Si Schottky barrier diodes (SBDs). For this study, Ti and Pt silicide contacts are formed on the (100)3C-SiC surface. The influence of the silicide formation temperature (500oC-650oC) on the contact electrical properties is investigated in detail. Current voltage (I-V) and capacitance voltage characteristics (C-V) are used to evaluate the reverse leakage current and extract the Schottky barrier height as well as the concentration of electrically active dopants in the N type 3C-SiC/Si. The Pt silicide Schottky contact is found to present higher energy barrier height than the Ti silicide Schottky contact and this trend was confirmed by the associated improved reverse current in the Pt Schottky. This is a promising result as it suggests that the reverse leakage is not dominated by the stacking faults inherent to this material. Temperature dependent I-V characteristics are measured and compared to theoretical I-V curves to explore the mechanisms responsible of the reverse leakage. The effort towards high blocking voltage final SBD device requires excellent PN junction edge termination. In this work, to avoid the damage caused by Al ion implantation, the electrical properties of 3C-SiC/Si PN junction diodes fabricated by epitaxy of P type 3C-SiC layers on N type 3C-SiC/Si substrates are also investigated. The reverse current mechanisms in the PN junction and the Schottky are compared and the suitability of the PN for device termination is discussed. [1] Kimoto, T., Cooper, J.A. Fundamentals of Silicon Carbide Technology: Growth, Characterization, Devices and Applications, Wiley, (2014) [2] A. Severino, C. Locke, R. Anzalone, et al., ECS Transactions, 35 (6), 99 (2011) [3] Okumura, H., Ohta, K., Feuillet, G., et al. Journal of Crystal Growth, 178 (1-2), 113, (1997)

This paper presents a silicon-based MEMS vibrating mesh nebulizer capable of producing micro droplets for inhaled drug delivery. The device concept, design, fabrication, and measurements are presented. The core element of the nebulizer (vibrating mesh) was fabricated using silicon process and consists of 1000 tapered micro-sized apertures. During operation the mesh vibrates at high frequency with the bending profile corresponding to the 02 resonance mode. The droplet diameter measured at the device output is 3.75 μm and a typical output rate is 0.45 ml / min.

The application of solid-state nanopore technology for biosensing is a rapidly developing area of research with high commercial potential. Different synthetic materials, including silicon nitride, alumina, and polymers, are employed to fabricate single and multiple pores and offer a good platform for selective biomolecule detection. Two solid-state pore arrays, one with integrated silicon microfluidic system, were considered and an immobilization strategy suitable for detecting a single-stranded DNA (ssDNA) sequence was investigated. For the silicon nitride pores, a modification method based on the use of 3-aminopropyltriethoxysilane for silanization and 1,4-phenylene diisothiocyanate for amine crosslinking was applied to immobilize 100-nM ssDNA (amine C6) and a 100-nM limit of detection for complementary to probe ssDNA (Cy5) was estimated. The polycarbonate pores (the second type of the pore arrays) underwent surface modification based on an oxidation reduction reaction using sodium periodate and sodium borohydride and was used to immobilize 10-nM ssDNA and an estimated 100-nM limit of detection was also achieved. Linear sweep voltammetry was used to characterize the pores and a current potential profile was obtained after both immobilization of probe ssDNA and hybridization of complementary to probe ssDNA on the modified pore array surface. A decrease in current amplitude was measured after surface modification of both pore arrays, and this was attributed to the appearance of an additional layer on the pore surface reducing the pore opening and hindering the current flow. The hybridization event was also supported by contact angle measurements, where an increase in hydrophilicity was recorded at the different surface modification steps that were applied to produce the biofunctionalized nanopore. In addition, fluorescence was observed on the surfaces after hybridization, through incorporation of a CY5 fluorescent tag attached on the 5’ end of the complementary to probe DNA. These results show the potential to use both silicon nitride and polycarbonate nanopores in DNA detection applications.

The fabrication of a novel ultrasharp silicon microneedle array for use as a physiological signal monitoring electrode is described. This work uses double-sided silicon wafer patterning and anisotropic potassium hydroxide wet etching to simultaneously create a microneedle on the front side of the wafer, and a through-silicon via from the backside. Metal deposition on both the front and the back of the wafer then establishes electrical contact through this via between both sides of the electrode. This technique eliminates the limitations associated with other approaches that are used to create front-to-back electrical contact and that may be slow or cumbersome. Wearable electrode prototypes have been assembled using these arrays, and electrocardiography (ECG) and electromyography (EMG) recordings have been carried out to verify the functionality of the technique.

Measuring the change in electrical properties of materials in the presence of moisture is a widely used method for humidity measurement. During the fabrication of a thin film humidity sensor, different layers of the device, as well as its moisture sensing film, undergo a series of commonly used manufacturing steps. Plasma treatment is one of these steps, primarily used for dry etching. However, exposing a moisture sensing film to plasma can modify physical and chemical properties of the film and affect sensor performance. We have examined the response of two humidity sensors fabricated using polyimide sensing film, one of them received plasma treatment during fabrication and the other did not. Despite the fact that the sensors were of similar design they exhibited different responses. Further investigations were conducted by examining the effects of plasma treatment on blanket polyimide films and the results are presented in this paper.

Nanopatterning of mesoporous silica thin films is achieved by a simple chemical-mechanical polishing (CMP) process. Mesoporous silica thin films are deposited onto topographically patterned (rectangular cross-section channels) silicon substrates so that good gap fill is achieved within the topography. The straight-etched channels promote the ordering of the mesopores along the length of the channel. CMP can then be used to successfully remove excess film above the channels from the mesas, to leave only the material within the channels, without disrupting pore order. These results indicate the robustness of these mesoporous materials to damage during the CMP process making the prospect of integrating these materials into advanced circuitry a possibility.

(100) germanium wafers were patterned by e-beam lithography with various exposure doses, in combination with dry etch, resulting in fin structures with widths in the range of approximately 20-150 nm with a high aspect ratio, running in either the [100] or [110] direction. Fins were also subjected to various anneals in N2 to examine germanium desorption but little or no size reduction was observed for realistic thermal budgets. Other samples received a phosphorus implant (at 7°) that partially amorphized the structures. The amorphous depth was 120 nm. Subsequently a 400 °C 3 min furnace anneal in N2 recrystallized the wide fins completely, leading to the formation of various defects, including twin boundaries, small localized defects, and stacking faults. Recrystallization was retarded in narrow fins as was reported in silicon fins.

In this work we present the results of a combined experimental and theoretical investigation into the capacitance-voltage characteristics of the high-k/In0.53Ga0.47As/InP system. The emphasis of the work is placed on the maximum measured and theoretical capacitance for n and p doped In0.53Ga0.47As epitaxial layers. Theoretical calculations based on ideal systems indicate a highly asymmetric CV response, with an equivalent oxide thickness correction ~ 1.4nm (Γ valley only) and ~ 0.23nm for the high-k/n-In0.53Ga0.47As/InP and high-k/p-In0.53Ga0.47As/InP systems respectively. The theoretical calculations are compared to experimental results for Al2O3 /In0.53Ga0.47As/InP MOS structures, and discrepancies are discussed.

This paper investigates the origin of the fixed positive oxide charge often experimentally observed in Metal Oxide Semiconductor (MOS) structures of SiO2 formed on cubic silicon carbide (3C-SiC). The electrical properties of MOS structures including either thermally grown SiO2 or deposited SiO2 by Plasma Enhanced Chemical Vapour Deposition (PECVD) on epitaxial 3C-SiC layers grown directly on Si are investigated. MOS structures with a range of oxide thickness values subjected to different thermal treatments were studied. It was found that both thermally grown and deposited SiO2 on 3C-SiC exhibit similar positive charge levels indicating that the charge originates from interface states at the 3C-SiC surface and not from the oxide. The nature of this surface charge in the SiO2/3C-SiC system is also discussed based on the current data and previously published results.

All existing transistors are based on the use of semiconductor junctions formed by introducing dopant atoms into the semiconductor material. As the distance between junctions in modern devices drops below 10 nm, extraordinarily high doping concentration gradients become necessary. Because of the laws of diffusion and the statistical nature of the distribution of the doping atoms, such junctions represent an increasingly difficult fabrication challenge for the semiconductor industry. Here, we propose and demonstrate a new type of transistor in which there are no junctions and no doping concentration gradients. These devices have full CMOS functionality and are made using silicon nanowires. They have near-ideal subthreshold slope, extremely low leakage currents, and less degradation of mobility with gate voltage and temperature than classical transistors.

Display Omitted 50nm InGaAs on insulator layers successfully transferred using wafer bonding.We fabricated semiconductor/insulator/semiconductor capacitor structures.CV characteristics were measured and compared to simulated small ac signal CVs.This approach is suitable for the study of the insulator/InGaAs bottom interface. The electrical properties of Au/Ni/In0.53Ga0.47As/Al2O3/SiO2/Si structures were investigated using capacitance voltage (C-V) analysis. The properties of the InGaAs on insulator structures were analysed by comparing the measured and the theoretical C-Vs obtained using a physics based simulation of this structure. The results show that the measured data obtained on both n-type and p-type silicon match very well the simulated data. This work also shows that this approach allows the characterisation of charges in the buried oxide as well as interface states at the bottom InGaAs/Al2O3 interface.

Aluminum nitride (AlN) is a piezoelectric material that is commonly used in various MEMS applications. However, determining the properties of the thin film typically requires multiple test structures, and there are various methods for obtaining the piezoelectric properties. This paper highlights the development of a capacitive based test structure that is capable of determining the different material properties. In addition this paper compares various test methods used to determine the piezoelectric properties of AlN.

Dielectric charging at low electric fields is characterized on radio-frequency microelectromechanical systems (RF MEMS) capacitive switches. The dielectric under investigation is silicon dioxide deposited by plasma enhanced chemical vapor deposition. The switch membrane is fabricated using a metal alloy which is shown to be mechanically robust. In the absence of mechanical degradation, these capacitive switches are appropriate test structures for the study of dielectric charging in MEMS devices. Monitoring the shift and recovery of device capacitance-voltage characteristics revealed the presence of a charging mechanism which takes place across the bottom metal-dielectric interface. Current measurements on metal-insulator-metal devices confirmed the presence of interfacial charging and discharging transient currents. The field-and temperature-dependence of these currents is the same as the well-known transient stress-induced leakage current (SILC) observed in flash memory devices. A simple model was created based on established transient SILC theory which accurately fits the measured data and reveals that charge exchange at the bottom metal-dielectric interface is responsible for charging currents and pull-in voltage changes in these MEMS devices. (C) 2015 AIP Publishing LLC.

International audience; This report describes a method for integration of a gel-liquid interface in hollow microneedles compatible with minimally invasive, electrochemical detection of drugs in vivo. The electrochemical sensor was characterised using cyclic voltammetry with tetraethyl ammonium. The experimental work demonstrated the detection of propranolol as a representative drug in physiological buffer with the microneedle system. A calibration curve for propranolol was built from measurements with differential pulse stripping voltammetry, indicating a sensitivity of 43 nA mu M-1, a limit of detection of 50 nM and a linear range between 50 and 200 nM.

The authors report on the structural and electrical properties of TiN/Al2O3/TiN metal–insulator–metal (MIM) capacitor structures in submicron three-dimensional (3D) trench geometries with an aspect ratio of ∼30. A simplified process route was employed where the three layers for the MIM stack were deposited using atomic layer deposition (ALD) in a single run at a process temperature of 250 °C. The TiN top and bottom electrodes were deposited via plasma-enhanced ALD using a tetrakis(dimethylamino)titanium precursor. 3D trench devices yielded capacitance densities of 36 fF/μm2 and quality factors >65 at low frequency (200 Hz), with low leakage current densities (

Top-down fabrication of sub-50nm silicon nanowire sensors with various geometries.Excellent performance as backgated junctionless nanowire transistors (JNTs).Very good sensing capabilities.Among the smallest top-down fabricated nanowire sensing devices reported to date. This article reports the fabrication of sub-50nm field effect transistor (FET)-type silicon (Si) nanowire (Si NW) chemical and biological sensing devices with a junctionless architecture, as well as on the initial characterisation of their electrical and sensing performance.The devices were fabricated using a fully complementary metal-oxide-semiconductor (CMOS)-compatible top-down process on silicon-on-insulator (SOI) wafers. The fabrication process was mainly based on high-resolution electron beam lithography (EBL) and reactive ion etching (RIE) but also included photolithography (mix-and-match lithography), thin film deposition by electron beam evaporation, lift-off, thermal annealing and wet etching.The sensing performance of a matrix of nanowire devices, i.e. containing 1, 3 and 20 NWs with lengths of 0.5, 1 and 10µm was examined. Each element of the matrix also contained five devices with different NW widths: 10, 20, 30, and 50nm and 5µm (a Si belt reference device). Electrical characterisation of the devices showed excellent performance as backgated junctionless nanowire transistors (JNTs): high on-currents in the range of 1-10µA and high ratios between the on-state and off-state currents (Ion/Ioff) of 6-7 orders of magnitude. In addition, the results of ionic strength sensing experiments demonstrate the very good sensing capabilities of these devices. To the best of our knowledge, these nanowire sensors are among the smallest top-down fabricated Si NW devices reported to date.

This paper assesses the skin penetration mechanisms and insertion forces of a microneedle-based dry electrode for physiological signal monitoring. Using force-displacement measurements, it is shown that these ultrasharp microneedles, fabricated using a bulk micromachining process and which have tip radii as low as 50 nm, penetrate in-vivo human skin smoothly and without a measurable rupturing action. Skin staining techniques have been used to demonstrate that 95% penetration is achieved at just 20 mN per needle. These very low penetration forces facilitate the design of safe microneedle arrays and remove the requirement for applicator devices. Wearable electrode prototypes have been assembled using these arrays, and electrocardiography (ECG) recordings have been carried out to verify the functionality of the technique.

We report the fabrication of junctionless SOI MOSFETs. Such devices greatly simplify processing thermal budget and behave as regular multigate SOI transistors.

Producción Científica, The authors investigate the templated crystallization of thin-body Ge fin structures with high aspect ratios. Experimental variables include fin thickness and thermal treatments, with fin structures oriented in the 〈110〉 direction. Transmission electron microscopy determined that various crystal defects form during crystallization of amorphous Ge regions, most notably {111} stacking faults, twin boundaries, and small crystallites. In all cases, the nature of the defects is dependent on the fin thickness and thermal treatments applied. Using a standard 600 °C rapid-thermal-anneal, Gestructures with high aspect ratios crystallize with better crystal quality and fewer uncured defects than the equivalent Si case, which is a cause for optimism for thin-film Ge devices., Science Foundation Ireland under Research Grant Nos. 09/SIRG/I1623 and 09/SIRG/I1621.

Polymer substrates are widely seen as a low-cost route to flexible circuits for systems incorporating displays, sensing functions and transistors. To date most polymer-based devices have involved passive components such as humidity sensors, constructed using metals and additional organic layers. The starting point of the study described here, is whether more advanced components incorporating functional materials can be integrated into devices on polymer substrates. An understanding will be required of the material factors that limit performance and, if possible, techniques developed to circumvent them so that their performance can be compared to that of standard silicon-based components.