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Volatile resistive switching random access memory (RRAM) devices are drawing attention in both storage and computing applications due to their high ON-/ OFF-ratio, fast switching speed, low leakage, and scalability. However, these devices are relatively new and the physical switching mechanisms are still under investigation. A thorough understanding and modeling of the physical dynamics underlying filament formation and self-dissolution are of utmost importance in view of future integration of volatile devices in neuromorphic systems and in memory arrays. To assess the physical mechanisms and develop appropriate models, though, the electrical properties of the device have to be characterized. In this article, we present an extensive study of Ag/SiO x -based volatile RRAM devices. Important parameters, such as switching time, switching voltage, and retention time are investigated as a function of the stimulation conditions. A physical explanation is provided and the applicability of the device in neuromorphic systems is discussed.

Understanding the switching mechanism of the volatile resistive switching random access memory (RRAM) device is important to harness its characteristics and further enhance its performance. Accurate modeling of its dynamic behavior is also of deep value for its applications both as selector and as short-term memory synapse for future neuromorphic applications operating in temporal domain. In this work, we investigate the switching and retention (relaxation) processes of the Ag-based metallic filamentary volatile resistive switching devices. We find that the switching process can be modeled by the ionic drift under electric field, while the retention process can be modeled by the ionic diffusion along the filament surface driven by the gradient of surface atomic concentration. Through further theoretical analysis, we also find that the ionic drift and ionic diffusion can be unified within the general Einstein relation. To confirm this relation, we collect ionic mobility and diffusivity data from the literature using the switching and retention model. Finally, we show that the read voltage dependent retention time can be explained by the competition between the ionic drift and diffusion flux.

This work presents a new numerical model for the electrochemical random-access memory (ECRAM), a three terminal analogue memory device where the defect concentration controls the conductance of a metal oxide channel. The model relies on partial differential equations for ionic drift-diffusion across the ECRAM stack, causing the potentiation and depression of the synaptic channel. The model accounts for experimentally-observed linear programming and temperature acceleration of potentiation/depression. The model is useful for predicting the device characteristics and optimizing the device geometry for analogue-domain neural network accelerators.

Embedded phase change memory (PCM) show optimized performance and reliability thanks to Ge enrichment of the active GeSbTe material. However, excess Ge tends to segregate in the virgin state, which requires an initial forming process for initializing the PCM device. This work presents the detailed energy landscape model for embedded PCMs before forming and after forming. The model predicts the distribution of PCM resistance as a function of forming conditions and read temperature. The model is validated by physical and electrical data, providing a physical interpretation of the forming process in terms of nanoscale element migration within the PCM.

An analytical model was proposed to simulate the resistive switching (RS) process of electrochemical metallization memory (ECM) device with a dual-layer structure, in which the AgInSbTe (AIST) buffer layer was introduced to combine with the amorphous carbon (a-C) dielectric layer. This dual-layer ECM device presented good memory performance, such as high switching uniformity, however, a suitable model was absent to understand its RS mechanism. The analytical model of Ag/AIST/a-C/Pt device was developed based on the formation and dissolution of the Ag-ion-based CF. Comparing to the common RS model considering one-step set/reset process, the multi-step of set/reset was utilized to fit with the dual-layer structure. The set/reset always occurs in the AIST layer at first step and in the a-C layer subsequently due to the lower active energy and thermal conductivity of AIST layer. Random disturbances were also introduced to simulate the device variation during the cycling process. Eventually, this model can well fit with the experimental data, providing an analytical tool for describing the RS process of ECM device.

The cross-point architecture for memory arrays is widely considered as one of the most attractive solutions for storage and memory circuits thanks to simplicity, scalability, small cell size, and consequently high density and low cost. Cost-scalable vertical 3-D cross-point architectures, in particular, offer the opportunity to challenge Flash memory with comparable density and cost. To develop scalable cross-point arrays, however, select devices with sufficient ON–OFF ratio, current capability, and endurance must be available. This paper presents a select device technology based on volatile resistive switching with Cu and Ag top electrode and silicon oxide (SiO x ) switching materials. The select device displays ultrahigh resistance window and good current capability exceeding 2 MAcm−2. Retention study shows a stochastic voltage-dependent ON–OFF transition time in the ${10}~\mu \text{s}$ –1 ms range, which needs to be further optimized for fast memory operation in storage class memory arrays.

The understanding of the dynamic mechanism of volatile resistive switching memory devices is of paramount importance to further increase the switching speed. It is also of great value for future neuromorphic applications which use such devices in temporal domain. In this work, we investigate the switching speed and retention time of metallic filamentary volatile resistive switching devices. We find that the switching speed can be quantitatively described by the ionic mobility, while the retention time can be quantitatively described by the surface ionic diffusion following the gradient descent of surface atomic concentration. Further analysis reveals that the ionic mobility and surface diffusivity can be connected with Einstein relation. Finally, evidences supporting this relation and experimental data showing the competition of the ionic drift and diffusion are collected and shown.

In this paper we propose a new method of estimating Joule heating in a resistive switching SiO x based device through the use of a micro-thermal stage (MTS). We show an electro-thermal characterization of the device during set/reset operation using the MTS structure as a thermometer, we then attempt to reconstruct the complete heating profile of the device through numerical modeling in COMSOL, then we simulate the reset condition of the device.

In the era of big data, there is a strong urge for novel methodologies of computing large amount of unstructured data with short latency and low power. Toward this goal, in-memory computing has emerged as a paradigm shift to enable processing the data directly within or close to the memory, thus overcoming the memory wall typical of the von Neumann architecture [1]. Computation within resistive memory devices, such as resistive switching memory (RRAM) and phase change memory (PCM) has the additional advantage of physical computing, where data are processed via fundamental physical laws, such as the Ohm's law and the Kirchhoff's law, thus enabling a massive parallelism and the consequent acceleration of computational tasks, such as the matrix-vector multiplication (MVM). In this work, we will demonstrate an extreme speedup for solving matrix algebra problems, such as solution of linear systems or calculation of eigenvectors, via MVM in crosspoint arrays of resistive memory devices with feedback configuration [2].

Silver/copper-filament-based resistive switching memory relies on the formation and disruption of a metallic conductive filament (CF) with relatively large surface-to-volume ratio. The nanoscale CF can spontaneously break after formation, with a lifetime ranging from few microseconds to several months, or even years. Controlling and predicting the CF lifetime enables device engineering for a wide range of applications, such as non-volatile memory for data storage, tunable short/long term memory for synaptic neuromorphic computing, and fast selection devices for crosspoint arrays. However, conflictive explanations for the CF retention process are being proposed. Here we show that the CF lifetime can be described by a universal surface-limited self-diffusion mechanism of disruption of the metallic CF. The surface diffusion process provides a new perspective of ion transport mechanism at the nanoscale, explaining the broad range of reported lifetimes, and paving the way for material engineering of resistive switching device for memory and computing applications., Resistive random-access memory is operated based on the formation and disruption of nanoscale conductive filaments, but a mechanistic understanding of this process remains unclear. Here, Wang et al. develop a surface-diffusion model to describe lifetime of filaments ranging from microseconds to years.

This work presents an optimized model for resistance evolution in PCM cells with Ge-rich GeSbTe (GST) alloy as active material. Unlike conventional Ge 2 Sb 2 Te 5 , the low-resistance (set) state of Ge-rich GST shows a resistance drift to high resistance R, similar to the high resistance (reset) state, which could be a potential risk for data reliability. We develop a Monte Carlo (MC) model which predicts the time evolution of R at the statistical level of a memory array at various temperature T. The model is validated against variable temperature annealing, such as the soldering profile in embedded PCM, supporting the good reliability of Ge-rich GST at high T.

Electrochemical metallization ReRAMs (ECM) - Experiments and modelling: General discussion

Producción Científica, Training and recognition with neural networks generally require high throughput, high energy efficiency, and scalable circuits to enable artificial intelligence tasks to be operated at the edge, i.e., in battery-powered portable devices and other limited-energy environments. In this scenario, scalable resistive memories have been proposed as artificial synapses thanks to their scalability, reconfigurability, and high-energy efficiency, and thanks to the ability to perform analog computation by physical laws in hardware. In this work, we study the material, device, and architecture aspects of resistive switching memory (RRAM) devices for implementing a 2-layer neural network for pattern recognition. First, various RRAM processes are screened in view of the device window, analog storage, and reliability. Then, synaptic weights are stored with 5-level precision in a 4 kbit array of RRAM devices to classify the Modified National Institute of Standards and Technology (MNIST) dataset. Finally, classification performance of a 2-layer neural network is tested before and after an annealing experiment by using experimental values of conductance stored into the array, and a simulation-based analysis of inference accuracy for arrays of increasing size is presented. Our work supports material-based development of RRAM synapses for novel neural networks with high accuracy and low-power consumption., European Union’s Horizon 2020 research and innovation programme (Grant Agreement No. 648635), German Research Foundation (grant FOR2093)

In our brain, information is exchanged among neurons in the form of spikes where both the space (which neuron fires) and time (when the neuron fires) contain relevant information. Every neuron is connected to other neurons by synapses, which are continuously created, updated, and stimulated to enable information processing and learning. Realizing the brain-like neuron/synapse network in silicon would enable artificial autonomous agents capable of learning, adaptation, and interaction with the environment. Toward this aim, the conventional microelectronic technology, which is based on complementary metal–oxide–semiconductor transistors and the von Neumann computing architecture, does not provide the desired energy efficiency and scaling potential. A generation of emerging memory devices, including resistive switching random access memory (RRAM) also known as the memristor, can offer a wealth of physics-enabled processing capabilities, including multiplication, integration, potentiation, depression, and time-decaying stimulation, which are suitable to recreate some of the fundamental phenomena of the human brain in silico. This work provides an overview about the status and the most recent updates on brain-inspired neuromorphic computing devices. After introducing the RRAM device technologies, we discuss the main computing functionalities of the human brain, including neuron integration and fire, dendritic filtering, and short- and long-term synaptic plasticity. For each of these processing functions, we discuss their proposed implementation in terms of materials, device structure, and brain-like characteristics. The rich device physics, the nano-scale integration, the tolerance to stochastic variations, and the ability to process information in situ make the emerging memory devices a promising technology for future brain-like hardware intelligence.

Brain-inspired neural networks can process information with high efficiency, thus providing a powerful tool for pattern recognition and other artificial intelligent tasks. By adopting binary inputs/outputs, neural networks can be used to perform Boolean logic operations, thus potentially surpassing complementary metal-oxide-semiconductor logic in terms of area efficiency, execution time, and computing parallelism. Here, the concept of stateful neural networks consisting of resistive switches, which can perform all logic functions with the same network topology, is introduced. The neural network relies on physical computing according to Ohm's law, Kirchhoff 's law, and the ionic migration within an output switch serving as the highly nonlinear activation function. The input and output are nonvolatile resistance states of the devices, thus enabling stateful and cascadable logic operations. Applied voltages provide the synaptic weights, which enable the convenient reconfiguration of the same circuit to serve various logic functions. The neural network can solve all two-input logic operations with just one step, except for the exclusive-OR (XOR) needing two sequential steps. 1-bit full adder operation is shown to take place with just two steps and five resistive switches, thus highlighting the high efficiencies of space, time, and energy of logic computing with the stateful neural network.

Perpendicular spin-transfer torque (p-STT) magnetic memory is gaining increasing interest as a candidate for storage-class memory, embedded memory, and possible replacement of static/dynamic memory. All these applications require extended cycling endurance, which should be based on a solid understanding and accurate modeling of the endurance failure mechanisms in the p-STT device. This paper addresses cycling endurance of p-STT memory under pulsed electrical switching. We show that endurance is limited by the dielectric breakdown of the magnetic tunnel junction stack, and we model endurance lifetime by the physical mechanisms leading to dielectric breakdown. The model predicts STT endurance as a function of applied voltage, pulsewidth, pulse polarity, and delay time between applied pulses. The dependence of the endurance on sample area is finally discussed.

The Collaborative Innovation Center of Suzhou Nano Science & Technology, the Jiangsu Key Laboratory for Carbon-Based Functional Materials & Devices, and the Priority Academic Program Development of Jiangsu Higher Education Institutions are also acknowledged. Stanford co-authors acknowledge support from the Non-volatile Memory Technology Research Initiative (NMTRI). An Chen from IBM is acknowledged for revision of section 5. Alok Ranjan from Singapore University of Technology and Design is acknowledged for useful discussion on section 3.5., Resistive switching (RS) is an interesting property shown by some materials systems that, especially during the last decade, has gained a lot of interest for the fabrication of electronic devices, being electronic non-volatile memories those that have received most attention. The presence and quality of the RS phenomenon in a materials system can be studied using different prototype cells, performing different experiments, displaying different figures of merit, and developing different computational analyses. Therefore, the real usefulness and impact of the findings presented in each study for the RS technology will be also different. In this manuscript we describe the most recommendable methodologies for the fabrication, characterization and simulation of RS devices, as well as the proper methods to display the data obtained. The idea is to help the scientific community to evaluate the real usefulness and impact of an RS study for the development of RS technology., This work has been supported by the Young 1000 Global Talent Recruitment Program of the Ministry of Education of China, the National Natural Science Foundation of China (grants no. 61502326, 41550110223, 11661131002), the Jiangsu Government (grant no. BK20150343), and the Ministry of Finance of China (grant no. SX21400213).

Resistive-switching memory (RRAM) based on metal oxide is currently considered as a possible candidate for future nonvolatile storage and storage-class memory. To explore possible applications of RRAM, the switching variability and the cycling endurance are key issues that must be carefully understood. To this purpose, we studied the switching variability and the endurance in pulsed regime for HfO x -based RRAM. We found that the resistance window, the set/reset variability, and the endurance are all controlled by the maximum voltage $V_{\rm stop}$ , which is applied during the negative-reset operation. We demonstrate that the endurance failure is triggered by a negative-set event, where the resistance suddenly decreases during the reset. Cycling endurance is studied as a function of time, compliance current and $V_{\rm stop}$ , allowing to develop an Arrhenius-law model, which is capable of predicting device lifetime under various conditions.

Phase change memory (PCM) operation relies on a combination of electrical, thermal, and structural effects at the nanoscale [1, 2, 3, 4, 5]. Under an externally applied electric field, electrical current flows across the device and causes power dissipation and a consequent increase of local temperature, thus inducing crystallization or melting/amorphization, depending on temperature (hence on voltage and current). The corresponding change of the device resistance can then be sensed by application of a relatively low voltage. Electrical characteristics of the crystalline and amorphous phases thus play a fundamental role in the programming and read behavior of the PCM device. The electrical current-voltage characteristics of the PCM device, for instance, control the read current margin, the programming current, and the energy consumption during memory array operation. To design the driving circuits for generating the voltage pulses for memory program and read, or for selecting the correct select device to allow selection/unselection of memory bits within a cross-point array, the device characteristics are an essential piece of information. The same applies to sensing circuits aimed at reading the memory state. Finally, the dependence of voltage and currents on the device geometry (e.g., thickness of the active layer, diameter of the bottom electrode) plays a leading role in determining the scaling behavior of the PCM device for various technology nodes. Optimization of PCM device should include a careful consideration of the electrical behavior, in combination to structural properties (melting and crystallization point, activation energy of crystallization, etc.) and thermal characteristics (thermal conductivity, thermal boundary resistances, etc.).

Resistive switching memory based on electrochemical reaction are receiving a great interest as a future technology for nonvolatile storage class memories with fast programming and low power operation. To achieve scalable and reliable electrochemical memories, the switching and stability mechanisms must be carefully understood. This work shows that the switching characteristics of electrochemical memory devices display a strong asymmetric behavior, which is attributed to the mechanical stress around the conductive filament (CF) in the set state. CF instability after pulsed set is also evidenced and explained in terms of the compressive stress. Stress relaxation is shown to significantly stabilize ECM, thus providing new guidelines to improve memory stability at low set/reset power.

To satisfy the growing market demand for embedded nonvolatile memory, alternative solutions to Flash technology are currently under investigation. Among these, phase change memory (PCM) is attracting strong interest due to the low cost of integration with the CMOS front-end and good scalability. Embedded PCM, however, must feature high reliability during both packaging and functional stages. This paper studies reliability of PCM based on Ge-rich GeSbTe, providing evidence for resistance drift and decay in both the reset and set states. Set-state instability is attributed to grain-boundary relaxation and grain growth. A unified model is presented, capable of predicting the reliability of set/reset states at elevated temperature.

The programming speed in a phase change memory (PCM) relies on the kinetics of crystallization in the pulsed regime. To predict the programming speed and retention of a PCM, a careful understanding and modeling of crystallization in the phase change material is essential. In this paper, we study crystallization kinetics directly in PCM devices. From thermal annealing and pulsed-set experiments, we extract the temperature dependence of the crystallization in a wide temperature range between 170°C and the melting point (about 620°C). Our results indicate two markedly different activation energies below/above 300°C, thus providing evidence for a non-Arrhenius crystallization kinetics in PCM.

Resistive switching memory (RRAM) is among the most promising technologies for storage class memory (SCM) and embedded nonvolatile memory (eNVM). Feasibility of RRAM as SCM and/or embedded memory requires large on/off ratio, good endurance, high retention, and the availability of a robust select element for crossbar array integration. This work presents Ti/SiO x RRAM with high on/off ratio (>104), good endurance (>107), high uniformity and strong retention (260°C for 1 hour), thanks to the high SiO x band gap. Ag/SiO x devices show volatile switching with high on/off ratio (> 107) and bidirectional operation applicable to select devices in crossbar arrays.

Phase change memory (PCM) has reached the status of mature technology for stand-alone, embedded, and storage-class memory (SCM). A key requirement for these applications is stability at high temperature (T) during soldering, packaging and operation. To this aim, new materials and algorithms to improve reliability are essential. Here we demonstrate bipolar switching in PCM resulting in low-current operation and excellent high-T reliability. DC and pulsed switching characteristics are explained by ion migration in the chalcogenide layer, as supported by TEM and T-dependent studies. Excellent reliability at high T is demonstrated and explained by a physical model.

Phase change materials based on chalcogenides are key enabling technologies for optical storage, such as rewritable CD and DVD and recently also electrical nonvolatile memory, named phase change memory (PCM). In a PCM, the amorphous or crystalline phase affects the material band structure, hence the device resistance. Although phase transformation is extremely fast and repeatable, the amorphous phase suffers structural relaxation and crystallization at relatively low temperatures, which may affect the temperature stability of PCM state. To improve the time/temperature stability of the PCM, novel operation modes of the device should be identified. Here, we present bipolar switching operation of PCM, which is interpreted by ion migration in the solid state induced by elevated temperature and electric field similar to the bipolar switching in metal oxides. The temperature stability of the high resistance state is demonstrated and explained based on the local depletion of chemical species from the electrode region.

Resistive switching memory (RRAM) features many optimal properties for future memory applications that make RRAM a strong candidate for storage-class memory and embedded nonvolatile memory. This paper addresses the cycling-induced degradation of RRAM devices based on a HfO2 switching layer. We show that the cycling degradation results in the decrease of several RRAM parameters, such as the resistance of the low-resistance state, the set voltage $V_{\mathrm{ set}}$ , the reset voltage $V_{\mathrm{ reset}}$ , and others. The degradation with cycling is further attributed to enhanced ion mobility due to defect generation within the active filament area in the RRAM device. A distributed-energy model is developed to simulate the degradation kinetics and support our physical interpretation. This paper provides an efficient methodology to predict device degradation after any arbitrary number of cycles and allows for wear leveling in memory array.

Phase change materials (PCMs) can exist in at least two different phases (an amorphous and one or more crystalline phases), and they can be switched repeatedly between these phases. The different phases have distinctly different physical properties such as electrical conductivity, optical reflectivity, mass density, or thermal conductivity. These differences and the repeatability of the switching give these materials the ability to store information. Rewritable compact discs, digital versatile discs, and Blu-ray™ discs store information in thin films of PCMs, using the difference in reflectivity between the phases as the storage mechanism. A novel solid-state memory technology that applies the difference in electrical resistivity is currently being developed, and possible future applications include reconfigurable logic. This article reviews the unique set of properties of PCMs and their current and future applications.

After revolutionizing the technology of optical data storage, phase change materials are being adopted in non-volatile semiconductor memories. Their success in electronic storage is mostly due to the unique properties of the amorphous state where carrier transport phenomena and thermally-induced phase change cooperate to enable high-speed, low-voltage operation and stable data retention possible within the same material. This paper reviews the key physical properties that make this phase so special, the quantitative framework of cell performance, and the future perspectives of phase-change memory devices at the deep nanoscale.

Set and reset characteristics are studied for unipolar and bipolar metal-oxide resistive-switching memory devices. We show a universal dependence of set-state resistance and reset current on the compliance current used during set, with negligible impact of metal-oxide composition and switching condition. An analytical Joule-heating model for universal reset is presented, predicting a weak dependence of reset temperature and voltage on diffusion and migration parameters in both unipolar- and bipolar-switching modes. Data for the reset voltage are shown for a wide range of unipolar and bipolar metal oxides, in support of our calculations.

Phase change memory (PCM) is attracting an increasing interest as next generation stand-alone and embedded memory technology. Quantitative predictions of PCM scaling require a thorough understanding of physical reliability mechanisms, such as current fluctuation, structural relaxation and crystallization in the amorphous phase. This work describes recent advances in the physical modeling of structure fluctuation, relaxation and crystallization for the amorphous chalcogenide in PCM cells, showing a unified interpretation of relaxation/crystallization kinetic. The statistical variability of crystallization in PCM arrays and potential limitations in memory downscaling are discussed.

Resistive-switching memory (RRAM) based on the metal-insulator transition in some metal oxides are attracting interest as potential post-Flash nonvolatile memory devices. RRAM offers high capability for geometrical scaling, thanks to its two terminal structure and the ability for 3D stacking, However, the mechanisms of switching and reliability and their dependence on cell scaling are still under debate. This work reviews the state-of-the-art understanding of NiO RRAMs, discussing the dependence of switching and reliability on cell resistance linked to the size and nature of the localized conductive path in the cell.

Phase-change memory (PCM) relies not only on phase transitions between the two structures of the chalcogenide materials but also on electronic switching in the amorphous material between off and on conductive states and vice versa. Transient effects associated to both transitions, like the delay time for threshold switching, the switching time, and the recovery time for the on to off transition, play a fundamental role in the operation of the PCM device, namely program, erase, and readout processes. This paper focuses on the transient modeling and simulation of the recovery effect in PCM cells. After providing physical insight into the recovery process, we present a numerical model able to account for the transient recovery of threshold voltage VT and of resistance R after the on -off transition. The impact of recovery effect on program-verify loops used for accurate positioning of R is discussed. The combination of switching and recovery effects is shown to give rise to relaxation oscillations under suitable bias conditions, and the transient model for switching and recovery is applied to describe and predict oscillation behavior of PCM.

The increasing need for smart systems in healthcare, wearable, and soft robotics is creating demand for low-power sensory circuits that can detect pressure, temperature, strain, and other local variables. Among the most critical requirements, the matrix circuitry to address the individual sensor device must be sensitive, immune to disturbances, and flexible within a high-density sensory array. Here, a strategy is reported to enhance the matrix addressing of a fully integrated flexible sensory array with an improvement of 108 fold in the maximum readout value of impedance by a bidirectional threshold switch. The threshold switch shows high flexibility (bendable to a radius of about 1 mm) and a high nonlinearity of ≈1010 by using a nanocontact structure strategy, which is revealed and validated by molecular dynamics simulations and experiments at variable mechanical stress. Such a flexible electronic switch enables a new generation of large-scale flexible and stretchable electronic and optoelectronic systems. NRF (Natl Research Foundation, S’pore) MOE (Min. of Education, S’pore) Accepted version

Interest in resistance switching is currently growing apace. The promise of novel high-density, low-power, high-speed nonvolatile memory devices is appealing enough, but beyond that there are exciting future possibilities for applications in hardware acceleration for machine learning and artificial intelligence, and for neuromorphic computing. A very wide range of material systems exhibit resistance switching, a number of which-primarily transition metal oxides-are currently being investigated as complementary metal-oxide-semiconductor (CMOS)-compatible technologies. Here, the case is made for silicon oxide, perhaps the most CMOS-compatible dielectric, yet one that has had comparatively little attention as a resistance-switching material. Herein, a taxonomy of switching mechanisms in silicon oxide is presented, and the current state of the art in modeling, understanding fundamental switching mechanisms, and exciting device applications is summarized. In conclusion, silicon oxide is an excellent choice for resistance-switching technologies, offering a number of compelling advantages over competing material systems.

Negative bias temperature instability (NBTI) is one of the major reliability concerns for analog and digital MOS devices. NBTI understanding and modeling is receiving a growing interest for failure prediction, depending on the temperature and duty cycle of dynamic-stress conditions. In this framework, we present a new NBTI model based on hole trapping and thermally activated relaxation. The model unifies previous concepts of hole tunneling/trapping and structural relaxation initiated by hole trapping. Simulation results can account for the time and temperature dependence of NBTI stress, NBTI recovery, and the dependence on thickness and nitridation technology of the gate dielectric. The numerical model may be used for physics-based reliability predictions of NBTI effects as a function of time, temperature, and stress regime.

Data retention in phase-change memory (PCM) devices is the result of two physical phenomena: structural relaxation (SR) and crystallization of the amorphous chalcogenide material. Although the two processes are rather different, we show in this paper that a common physical interpretation for SR and crystallization kinetics is possible. Activation energies and Arrhenius pre-factors for SR and crystallization are found to coherently obey a Meyer-Neldel rule and are explained by many-body thermal excitation of weakly-bonded and normally-bonded clusters, respectively.

The phase-change memory (PCM) relies on the electrical properties of the chalcogenide materials to represent the stored bit of information. As a result, data stability depends on structural relaxation (SR) in the amorphous chalcogenide phase, which results in a temperature-accelerated time evolution of the electrical properties of the active material. Here, we address the time, temperature, and bias dependence of SR effects on the amorphous Ge2Sb2Te5 (GST) material used in PCM cells. Electrical measurements for increasing annealing time and temperature indicate that SR can be described by a defect annihilation process in the amorphous chalcogenide material. Finally, the stability of chalcogenide resistance as a function of the read conditions is discussed, for the purpose of reducing the impact of SR on the reliability of PCM devices.

Phase-change memory (PCM) cells are affected by structural relaxation (SR), which is the atomic-scale rearrangement of the amorphous phase of the chalcogenide material. Since SR affects the stability of electrical parameters of the PCM cell, such as resistance and threshold voltage, physics-based models for SR are necessary to analyze and predict the device reliability. This paper presents a physical model for SR in amorphous chalcogenide materials, linking the defect annihilation dynamics to the conduction behavior of the cell, hence to the electrical characteristics of the PCM cell. The model is able to predict the PCM cell characteristics as a function of annealing time, temperature, and read conditions.

The physical understanding of the programming and reliability mechanisms in resistive-switching memory devices requires a detailed characterization of the electrical and thermal conduction properties in the low-resistance state of the memory cell. The aim of this paper is the characterization of the conductive filament (CF), which controls the localized current flow in the low resistive state of the cell. Based on a new technique for evaluating the CF temperature during operation, we perform a statistical characterization of the critical filament temperature for the reset operation, i.e., the transition to the high-resistance state by the thermal dissolution of the CF. The thermal resistance of the CF and the activation energy for the dissolution mechanism are then evaluated, allowing for a physics-based numerical modeling of the reset operation based on CF thermal breakup.

The electronic behavior of the chalcogenide material used in phase-change memory (PCM) plays a key role in defining the operation voltages and times of the memory cell. In particular, the threshold voltage for electronic switching of the amorphous chalcogenide determines the boundary between programming and readout operation, while its resistance allows the recognition of the bit status. This paper present a time-resolved analysis of threshold voltage and resistance in a PCM. Both dynamics of threshold voltage and resistance display a fast transient, named recovery behavior, in the first 30 ns after programming. A slower, nonsaturating drift transient is found for longer times. The two transients are discussed referring to electronic and structural rearrangements in the amorphous chalcogenide. Finally, the impact on the device level is considered

Resistive switching memory (RRAM) devices are currently under consideration for applications as high-density memory, embedded memory and storage class memory. For such applications, low operation current, high uniformity of programmed/erased distributions and high cycling endurance are required. This work addresses switching variability and endurance in RRAM under pulsed operation. Variability of set/reset states is attributed to the Poissonian distribution of defect numbers in the conductive filament (CF). Variability and endurance are mainly controlled by the maximum voltage V-stop used for the reset operation. The negative set and the consequent collapse of the resistance window are evidenced to play the dominant role in limiting endurance lifetime of RRAM. Physical mechanisms and models for voltage-controlled variability and endurance are discussed.

Thermoelectric effects play an important role in phase change memory (PCM), where phase transition and atomic migration are accelerated by temperature. A deep understanding of thermoelectric effects may allow a physics-based design of the cell structure and materials to optimize programming speed/energy and reliability. In this work we study the polarity-dependence of PCM characteristics, including crystallization, melting, electrical switching/holding, and ion migration. These characteristics show slower kinetics at negative voltage, which we attribute to thermoelectric effects of electrically-induced heating. We demonstrate a universal correlation of positive/negative kinetics, which we reproduce by modelling Thomson and Peltier heating in the PCM device.

Joule heating in phase change memory (PCM) controls programming characteristics, read disturb, and programming disturb. To optimize the energy consumption and reliability of PCM, a thorough understanding of Joule heating as a function of the electrical operation of the device is thus strongly required. This paper presents a comprehensive characterization of thermoelectric (TE) effects in PCM operated at positive and negative voltage polarity. The impact of polarity was studied for all major temperature-dependent properties of the PCM device, namely, melting, crystallization, ion migration, threshold switching, and holding. It was demonstrated that heating is less efficient under negative voltage, compared with positive voltage. It was also shown that the positive and negative voltages needed to induce all above phenomena display a universal correlation. We propose a unified finite-element model for the PCM, which correctly accounts for the observed polarity-dependent heating and the universal voltage characteristics. The impact of isotropic scaling on TE is finally addressed.

Data retention and its statistics are the key issues for the development of next generation phase-change memory (PCM) arrays. For this reason, the understanding and modeling of cell-to-cell and cycle-to-cycle variabilities of retention time are essential. This paper provides an extensive experimental characterization of retention statistics in 45-nm PCM technology and presents a Monte Carlo model for variability based on a Gaussian spread in the activation energy for crystallization. Results show that both cell-to-cell and cycle-to-cycle variabilities are well explained by a Gaussian spread in the activation energy for crystallization, due to local composition/structure changes in PCM active volume.