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The large displacements of functionally graded sandwich (FGSW) beams in thermal environment are studied using a finite element formulation. The beams are composed of three layers, a homogeneous core and two functionally graded face sheets with volume fraction of constituents following a power gradation law. The material properties of the beams are considered to be temperature-dependent. Based on Antman beam model and the total Lagrange formulation, a two-node nonlinear beam element taking the effect of temperature rise into account is formulated and employed in the study. The element with explicit expressions for the internal force vector and tangent stiffness matrix is derived using linear interpolations and reduced integration technique to avoid the shear locking. Newton-Raphson based iterative algorithm is employed in combination with the arc-length control method to compute the large displacement response of a cantilever FGSW beam subjected to end forces. The accuracy of the formulated element is confirmed through a comparison study. The effects of the material inhomogeneity, temperature rise and layer thickness ratio on the large deflection response of the beam are examined and highlighted.

Tin and its derivatives have provoked tremendous progress of high‐capacity sodium‐ion anode materials. However, achieving high areal and volumetric capability with maintained long‐term stability in a single electrode remains challenging. Here, an elegant and versatile strategy is developed to significantly extend the lifespan and rate capability of tin sulfide nanobelt electrodes while maintaining high areal and volumetric capacities. In this strategy, in situ bundles of robust hierarchical graphene (hG) are grown uniformly on tin sulfide nanobelt networks through a rapid (5 min) carbon‐plasma method with sustainable oil as the carbon source and the partially reduced Sn as the catalyst. The nucleation of graphene, CN (with size N ranging from 1 to 24), on the Sn(111) surface is systematically explored using density functional theory calculations. It is demonstrated that this chemical‐bonded hG strategy is powerful in enhancing overall electrochemical performance.

We calculated the connection probability, P C, between electrodes on the basis of the triangular lattice percolation model for investigating the effect of distance variation between electrodes and the electrode width on fabricated capacitively coupled single-electron transistors. Single-electron devices were fabricated via the dispersion of gold nanoparticles (NPs). The NPs were dispersed via the repeated dropping of an NP solution onto a chip. The experimental results were fitted to the calculated values, and the fitting parameters were compared with the occupation probability, P O, which was estimated for one drop of the NP solution. On the basis of curves of the drain current versus the drain-source voltage (I D−V DS) measured at 77 K, the current was suppressed at approximately 0 V.

We demonstrated one type of single-electron device that exhibited electrical characteristics similar to those of resistively-coupled SE transistor (R-SET) at 77 K and room temperature (287 K). Three Au electrodes on an oxidized Si chip served as drain, source, and gate electrodes were formed using electron-beam lithography and evaporation techniques. A narrow (70-nm-wide) gate electrode was patterned using thermal evaporation, whereas wide (800-nm-wide) drain and source electrodes were made using shadow evaporation. Subsequently, aqueous solution of citric acid and 15-nm-diameter gold nanoparticles (Au NPs) and toluene solution of 3-nm-diameter Au NPs chemisorbed via decanethiol were dropped on the chip to make the connections between the electrodes. Current–voltage characteristics between the drain and source electrodes exhibited Coulomb blockade (CB) at both 77 and 287 K. Dependence of the CB region on the gate voltage was similar to that of an R-SET. Simulation results of the model based on the scanning electron microscopy image of the device could reproduce the characteristics like the R-SET.

We fabricated a single-electron (SE) device using gold nanoparticles (Au NPs). Drain, source, and gate electrodes on a SiO $${_2}$$ /Si substrate were formed using electron beam lithography (EBL) and thermal evaporation of Au. Subsequently, solutions of 3-nm-diameter and 5-nm-diameter Au NPs were dropped on the device to make current paths through Au NPs among the electrodes. Measurements of the device exhibited negative differential resistance (NDR) in the current–voltage characteristics between the drain and source electrodes at room temperature (298 K). The NDR behavior was tuned by applying a gate voltage.