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In this paper, the design and simulation results of a general-purpose fuzzy logic controller, 5-bit digital inputs, and analog output are presented. Based on a new strategy, it provides simplicity and high speed from the analog prospective and a total digital system advantages with unchanged digital system properties. A novel and reliable structure with respect to other topologies for the fuzzifier section is designed which enhances the accuracy and the velocity. In order to detect maximum, minimum, and mixed mode (both minimum and maximum) of the input voltages at the same time, an inference engine consisting of a min and max circuit is an addition. The benchmark for the defuzzifier in the proposed design is simplicity and through a simple approach, and the center of area is attributed to the defuzzifier. The proposed controller circuit consists of two inputs, nine rules and one output designed in TSMC standard 0.18 µm CMOS technology and simulated with MATLAB systematically. The total controller circuit is simulated with HSPICE simulator (BSIM3v3 parameters), and the layouts were extracted with Cadence Virtuoso v 5.1. The whole chip area is less than 0.7 mm2, inference speed of the controller is about 39.2 MFLIPS (fuzzy logic inference per second), and the average power consumption is 2.61 mW. [ABSTRACT FROM AUTHOR]

In this article, a new current-mode, accurate, and fully programmable Interval Type-2 (IT2) membership function generator (MFG) in 0.18 m CMOS technology is presented. This IT2 fuzzifier is based on a Type-1(T1) fuzzifier that uses a new method for slope tuning. The proposed slope tuning method, leads to smaller active area and also significantly smaller total die area by reducing the number of required pins in comparison with previous methods. Small area, low power consumption, and especially suitable programming method, makes the proposed IT2 MFG suitable for fuzzifier block of general-purpose Fuzzy Logic Controllers (FLCs). The proposed IT2 MFG has an average power consumption of 570Wand has an area of 0.0183mm2. Simulation results using HSPICE in a typical 0.18 m CMOS technology are presented to analyze the behavior of designed circuits. [ABSTRACT FROM AUTHOR]

In this paper, an Anti-lock braking system (ABS) is designed using a fuzzy logic controller (FLC). The FLC is designed in 0.35 μm standard CMOS process and this design of the circuit makes it having high speed and low power consumption. Also, all the controlling signals and input signals are in voltage form and there is no need for digital programming. Voltage mode design of the circuits leads to the convenient use of FLC with sensors. The objective function is designed to keep the wheel slip to a desired level so that maximum wheel tractive force and maximum vehicle deceleration are achieved. By training this function to the Adaptive Nero-Fuzzy Inference System (ANFIS) of MATLAB software the main parameters of fuzzy controller singletons and shape of Membership Function Generators (MFGs) are measured, then all the circuits of the proposed fuzzy logic controller is designed using Complementary Metal-Oxide-Semiconductor (CMOS) circuits, at the end simulation results of the fuzzy logic controller using Hspice simulator and BSIM3v3 (Berkeley Short-Channel Insulated gate field effect transistor Model) parameters verifies the performance and functionality of the design. [ABSTRACT FROM AUTHOR]

This paper presents a new Fuzzy Logic Controller (FLC) having the ability to support fractional polynomial membership functions. These functions are general forms of triangular and trapezoidal membership functions, and also those functions which are used in linguistic hedge FLC (LHFLC). A two-input, single-output Takagi–Sugeno–Kang (TSK) type 0 FLC is designed in 0.35 μm standard CMOS process. Analog realization of the circuit makes the design programmable and extendable, while having high speed and low power consumption. Also all the control signals and input signals are in voltage form and no need for digital programmability. Voltage mode realization of the circuits leads to a simple use of FLC with other circuits which are in voltage mode like sensors. Simulation results of the controller using HSPICE simulator and BSIM3v3 parameters, and comparing them with ideal results obtained from MATLAB software verify the functionality and performance of the design. [ABSTRACT FROM AUTHOR]