22 results on '"Sirakoulis, Georgios Ch."'
Search Results
2. Shortest Path Computing Using Memristor-Based Circuits and Cellular Automata
- Author
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Stathis, Dimitrios, Vourkas, Ioannis, Sirakoulis, Georgios Ch., Hutchison, David, Series editor, Kanade, Takeo, Series editor, Kittler, Josef, Series editor, Kleinberg, Jon M., Series editor, Kobsa, Alfred, Series editor, Mattern, Friedemann, Series editor, Mitchell, John C., Series editor, Naor, Moni, Series editor, Nierstrasz, Oscar, Series editor, Pandu Rangan, C., Series editor, Steffen, Bernhard, Series editor, Terzopoulos, Demetri, Series editor, Tygar, Doug, Series editor, Weikum, Gerhard, Series editor, Wąs, Jarosław, editor, Sirakoulis, Georgios Ch., editor, and Bandini, Stefania, editor
- Published
- 2014
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3. Memristors in Cellular-Automata-Based Computing: A Review.
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Karamani, Rafailia-Eleni, Fyrigos, Iosif-Angelos, Ntinas, Vasileios, Vourkas, Ioannis, Adamatzky, Andrew, and Sirakoulis, Georgios Ch.
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MEMRISTORS ,CELLULAR automata ,PROCESS capability ,NANOELECTRONICS ,CIRCUIT elements ,COMPUTER systems - Abstract
The development of novel hardware computing systems and methods has been a topic of increased interest for researchers worldwide. New materials, devices, and architectures are being explored as a means to deliver more efficient solutions to contemporary issues. Along with the advancement of technology, there is a continuous increase in methods available to address significant challenges. However, the increased needs to be fulfilled have also led to problems of increasing complexity that require better and faster computing and processing capabilities. Moreover, there is a wide range of problems in several applications that cannot be addressed using the currently available methods and tools. As a consequence, the need for emerging and more efficient computing methods is of utmost importance and constitutes a topic of active research. Among several proposed solutions, we distinguish the development of a novel nanoelectronic device, called a "memristor", that can be utilized both for storing and processing, and thus it has emerged as a promising circuit element for the design of compact and energy-efficient circuits and systems. The memristor has been proposed for a wide range of applications. However, in this work, we focus on its use in computing architectures based on the concept of Cellular Automata. The combination of the memristor's performance characteristics with Cellular Automata has boosted further the concept of processing and storing information on the same physical units of a system, which has been extensively studied in the literature as it provides a very good candidate for the implementation of Cellular Automata computing with increased potential and improved characteristics, compared to traditional hardware implementations. In this context, this paper reviews the most recent advancements toward the development of Cellular-Automata-based computing coupled with memristor devices. Several approaches for the design of such novel architectures, called "Memristive Cellular Automata", exist in the literature. This extensive review provides a thorough insight into the most important developments so far, helping the reader to grasp all the necessary information, which is here presented in an organized and structured manner. Thus, this article aims to pave the way for further development in the field and to bring attention to technological aspects that require further investigation. [ABSTRACT FROM AUTHOR]
- Published
- 2023
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4. Wave Cellular Automata for Computing Applications
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Chatzinikolaou, Theodoros Panagiotis, Fyrigos, Iosif-Angelos, Ntinas, Vasileios, Kitsios, Stavros, Bousoulas, Panagiotis, Tsompanas, Michael-Antisthenis, Tsoukalas, Dimitris, Adamatzky, Andrew, and Sirakoulis, Georgios Ch.
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Cellular automata ,Cellular automaton ,Wave propagation ,Sound-waves ,Ones sonores ,Complex networks ,Sistemes informàtics ,Higher efficiency ,Memristor ,Computer systems ,Computing applications ,Margolus gate ,Systems complexity ,Autòmats cel·lulars ,Informàtica [Àrees temàtiques de la UPC] ,Growing demand ,Computing system ,Systems-driven ,Memristors ,Unconventional computing ,Cellular automatons - Abstract
There is a continuous urge for higher efficiency in conventional computing systems, driven by an ever-growing demand for these systems’ complexity to be able to match the one of convoluted and challenging problems. However, this type of problems has formulated the benchmarks for unconventional computing systems to validate their emerging applicability and prove their effectiveness. Towards this path, Cellular Automata (CAs) have been established as a promising mathematical tool for simulating physical processes and demonstrated a favourable methodology for effectively implementing computations in hardware by taking advantage of their inherent parallelism. Representing CAs with oscillating memristive networks could further enhance the performance of these systems, by incorporating the rich dynamics evident in memristors and their strong memory and computing features. In this work, a wave generator circuit has been designed with low-voltage fabricated CBRAM devices, that is able to act as a Wave Cellular Automaton (WCA). These wave generation units are located on a grid with adjusting multi-directional interconnections between neighbors. In addition to that, the ability to reconFigure the amount of such units that influence each other, facilitates the propagation of voltage signals through the grid following wave propagation features. An example of this computational domain is presented with the realization of complex logic gates on the grid of WCAs.
- Published
- 2022
5. Beneficial Role of Noise in Hf-based Memristors
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Rodriguez, Rosana, Martin Martinez, Javier, Salvador, Emili, Crespo Yepes, Albert, Miranda, Enrique Alberto, Nafria, Montserrat, Rubio Sola, Jose Antonio, Ntinas, Vasileios, Sirakoulis, Georgios Ch., and Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica
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Stochastic systems ,Performance ,RRAM devices ,Integrated circuits ,Enginyeria electrònica::Microelectrònica::Circuits integrats [Àrees temàtiques de la UPC] ,Memristor ,RRAM device ,Circuit resonance ,RRAM ,Resistance ratio ,Bias circuitry ,Current voltage characteristics ,Gaussians ,Resonance effect ,Magnetic resonance ,Additive noise ,Standard deviation ,Resistive switching ,Stochastic resonances ,Circuits integrats ,Memristors ,Gaussian noise (electronic) ,Stochastic resonance - Abstract
© 2022 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes,creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The beneficial role of noise in the performance of Hf-based memristors has been experimentally studied. The addition of an external gaussian noise to the bias circuitry positively impacts the memristors characteristics by increasing the OFF/ON resistances ratio. The known stochastic resonance effect has been observed, when changing the standard deviation of the noise. The influence of the additive noise on the memristor current-voltage characteristic and on the set and reset related parameters are also presented. This research was funded by Spanish MCIN/AEI/10.13039/501100011033, Project PID2019- 103869RB and TEC2017-90969-EXP.
- Published
- 2022
6. Nano-Crossbar Memories Comprising Parallel/Serial Complementary Memristive Switches
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Vourkas, Ioannis and Sirakoulis, Georgios Ch.
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- 2014
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7. On Edge Image Processing Acceleration with Low Power Neuro-Memristive Segmented Crossbar Array Architecture.
- Author
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VASILEIADIS, NIKOLAOS, NTINAS, VASILEIOS, KARAKOLIS, PANAGIOTIS, DIMITRAKIS, PANAGIOTIS, and SIRAKOULIS, GEORGIOS CH.
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IMAGE processing ,BIOLOGICALLY inspired computing ,EDGE computing - Abstract
Computational acceleration for image processing tasks on the edge is becoming increasingly important for many applications. This work presents a new neuro-inspired architecture which incorporates inmemory computing properties for image processing complex computational tasks in addition to analog memory. The proposed architecture was based on segmented crossbar topology, which, as it turns out, reduces many phenomena that affect the performance on such systems. The extended architectural capabilities of this structure were also tested in a systematic analysis that was performed on a novel depth map extraction application from a single defocused image. All results were validated through Spice simulations using a novel moving barrier memristor model. [ABSTRACT FROM AUTHOR]
- Published
- 2022
8. Chemical Wave Computing from Labware to Electrical Systems.
- Author
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Chatzinikolaou, Theodoros Panagiotis, Fyrigos, Iosif-Angelos, Ntinas, Vasileios, Kitsios, Stavros, Tsompanas, Michail-Antisthenis, Bousoulas, Panagiotis, Tsoukalas, Dimitris, Adamatzky, Andrew, and Sirakoulis, Georgios Ch.
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CHEMICAL systems ,ELECTRIC circuits ,OSCILLATIONS ,THIN films ,THEORY of wave motion - Abstract
Unconventional and, specifically, wave computing has been repeatedly studied in laboratory based experiments by utilizing chemical systems like a thin film of Belousov–Zhabotinsky (BZ) reactions. Nonetheless, the principles demonstrated by this chemical computer were mimicked by mathematical models to enhance the understanding of these systems and enable a more detailed investigation of their capacity. As expected, the computerized counterparts of the laboratory based experiments are faster and less expensive. A further step of acceleration in wave-based computing is the development of electrical circuits that imitate the dynamics of chemical computers. A key component of the electrical circuits is the memristor which facilitates the non-linear behavior of the chemical systems. As part of this concept, the road-map of the inspiration from wave-based computing on chemical media towards the implementation of equivalent systems on oscillating memristive circuits was studied here. For illustration reasons, the most straightforward example was demonstrated, namely the approximation of Boolean gates. [ABSTRACT FROM AUTHOR]
- Published
- 2022
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9. Power-Efficient Noise-Induced Reduction of ReRAM Cell’s Temporal Variability Effects.
- Author
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Ntinas, Vasileios, Rubio, Antonio, Sirakoulis, Georgios Ch., Aguilera, Emili Salvador, Pedro, Marta, Crespo-Yepes, Albert, Martin-Martinez, Javier, Rodriguez, Rosana, and Nafria, Montserrat
- Abstract
Resistive Random Access Memory (ReRAM) is a promising novel memory technology for non-volatile storing, with low-power operation and ultra-high area density. However, ReRAM memories still face issues through commercialization, mainly owing to the fact that the high fabrication variations and the stochastic switching of the manufactured ReRAM devices cause high Bit Error Rate (BER). Given that ReRAM devices are nonlinear elements, the nonlinear phenomenon of Stochastic Resonance (SR), which defines that an input disturbance with specific characteristics can improve the total performance of the nonlinear system, is used to reduce the ReRAM cell’s BER. Thus, in this brief, the BER of a single ReRAM cell is explored, using the Stanford PKU model, and is improved after the application of specific additive input noise. The power dissipation of the proposed approach is also evaluated and compared with the consideration of higher amplitude writing pulses in the lack of noise, showing that the proposed noise-induced technique can decrease the BER without the excessive increase of the power dissipation. As a first step, towards the experimental verification of the proposed method, noise-induced measurements on a single fabricated ReRAM device are also performed. Overall, the presented results of the BER reduction with low power dissipation, reaching up to 3.26 × less power consumption considering 100 ns writing pulses, are encouraging for ReRAM designers, delivering a circuit-level solution against the device-level problem. [ABSTRACT FROM AUTHOR]
- Published
- 2021
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10. Voltage Divider for Self-Limited Analog State Programing of Memristors.
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Gomez, Jorge, Vourkas, Ioannis, Abusleme, Angel, Sirakoulis, Georgios Ch., and Rubio, Antonio
- Abstract
Resistive switching devices—memristors—present a tunable, incremental switching behavior. Tuning their state accurately, repeatedly and in a wide range, makes memristors well-suited for multi-level (ML) resistive memory cells and analog computing applications. In this brief, the tuning approach based on a memristor-resistor voltage divider (VD) is validated experimentally using commercial memristors from Knowm Inc. and a custom circuit. Rapid and controllable multi-state SET tuning is shown with an appreciable range of different resistance values obtained as a function of the amplitude of the applied voltage pulse. The efficiency of the VD is finally compared against an adaptive pulse-based tuning protocol, in terms of circuit overhead, tuning precision, tuning time, and energy consumption, qualifying as a simple hardware solution for fast, reliable, and energy-efficient ML resistance tuning. [ABSTRACT FROM AUTHOR]
- Published
- 2020
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11. Heterogeneous memristive crossbar for in-memory computing
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Papandroulidakis, Georgios, Vourkas, Ioanis, Sirakoulis, Georgios Ch., Rubio Sola, Jose Antonio, Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica, and Universitat Politècnica de Catalunya. HIPICS - Grup de Circuits i Sistemes Integrats d'Altes Prestacions
- Subjects
Computation theory ,Computer science ,Memristor ,Parallel computing ,Crossbar arrays ,Control signal ,law.invention ,Digital logic ,Computing paradigm ,symbols.namesake ,In-Memory Processing ,law ,Logic computation ,Computer architecture ,Ordinadors -- Memòries semiconductores ,Parallel read ,Reading (computer) ,Reconfigurable computing ,Reconfigurable hardware ,Enginyeria electrònica::Microelectrònica [Àrees temàtiques de la UPC] ,Memory operations ,CMOS ,Logic gate ,symbols ,Neumann computing ,Digital devices ,Crossbar switch ,Memristors ,Von Neumann architecture - Abstract
It's been quite a while since scientists are seeking for the ancestor of von Neumann computing architecture. Among the most promising candidates, memristor demonstrates advantageous characteristics, which open new pathways for the exploration of advanced computing paradigms. In this work we propose the design of a novel crossbar geometry, which is heterogeneous in terms of its cross-point devices, allowing for the realization of true in-memory digital logic computations. More specifically, it is a combination of two stacked crossbar arrays with a shared intermediate nanowire layer. The variety of available cross-points types allows the execution of parallel memristive logic computations, where the logic state variable is voltage. Moreover, the utilization of insulating patterns in the crossbar arrays, at the expense of a small area-overhead, permits the simultaneous parallel read/write memory operation of two memory words. Memory/logic operation is determined through control signals driven from the peripheral CMOS-based driving circuitry, which also comprises row/column decoders, tri-state drivers, and summing/ sense amplifiers to allow for the proper programming/reading of the memristive cross-points
- Published
- 2015
12. Experimental Study of Artificial Neural Networks Using a Digital Memristor Simulator.
- Author
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Ntinas, Vasileios, Vourkas, Ioannis, Abusleme, Angel, Sirakoulis, Georgios Ch., and Rubio, Antonio
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ASSOCIATIVE storage ,MEMRISTORS ,ARTIFICIAL neural networks - Abstract
This paper presents a fully digital implementation of a memristor hardware (HW) simulator, as the core of an emulator, based on a behavioral model of voltage-controlled threshold-type bipolar memristors. Compared to other analog solutions, the proposed digital design is compact, easily reconfigurable, demonstrates very good matching with the mathematical model on which it is based, and complies with all the required features for memristor emulators. We validated its functionality using Altera Quartus II and ModelSim tools targeting low-cost yet powerful field-programmable gate array families. We tested its suitability for complex memristive circuits as well as its synapse functioning in artificial neural networks, implementing examples of associative memory and unsupervised learning of spatiotemporal correlations in parallel input streams using a simplified spike-timing-dependent plasticity. We provide the full circuit schematics of all our digital circuit designs and comment on the required HW resources and their scaling trends, thus presenting a design framework for applications based on our HW simulator. [ABSTRACT FROM AUTHOR]
- Published
- 2018
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13. Crossbar-Based Memristive Logic-in-Memory Architecture.
- Author
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Papandroulidakis, Georgios, Vourkas, Ioannis, Abusleme, Angel, Sirakoulis, Georgios Ch., and Rubio, Antonio
- Abstract
The use of memristors and resistive random access memory (ReRAM) technology to perform logic computations, has drawn considerable attention from researchers in recent years. However, the topological aspects of the underlying ReRAM architecture and its organization have received less attention, as the focus has mainly been on device-specific properties for functionally complete logic gates through conditional switching in ReRAM circuits. A careful investigation and optimization of the target geometry is thus highly desirable for the implementation of logic-in-memory architectures. In this paper, we propose a crossbar-based in-memory parallel processing system in which, through the heterogeneity of the resistive cross-point devices, we achieve local information processing in a state-of-the-art ReRAM crossbar architecture with vertical group-accessed transistors as cross-point selector devices. We primarily focus on the array organization, information storage, and processing flow, while proposing a novel geometry for the cross-point selection lines to mitigate current sneak-paths during an arbitrary number of possible parallel logic computations. We prove the proper functioning and potential capabilities of the proposed architecture through SPICE-level circuit simulations of half-adder and sum-of-products logic functions. We compare certain features of the proposed logic-in-memory approach with another work of the literature, and present an analysis of circuit resources, integration density, and logic computation parallelism. [ABSTRACT FROM PUBLISHER]
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- 2017
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14. 2T1M-Based Double Memristive Crossbar Architecture for In-Memory Computing.
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VOURKAS, IOANNIS, PAPANDROULIDAKIS, GEORGIOS, SIRAKOULIS, GEORGIOS CH., and ABUSLEME, ANGEL
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CROSSBAR switches (Electronics) ,MEMRISTORS ,ELECTRIC resistors ,PASSIVE components ,NANOELECTRONICS - Abstract
The recent discovery of the memristor has renewed the interest for fast arithmetic operations via high-radix numeric systems. In this direction, a conceptual solution for high-radix memristive arithmetic logic units (ALUs) was recently published. The latter combines CMOS circuitry for data processing and a reconfigurable "segmented" crossbar memory block. In this paper we build upon such a conceptual design and propose a 3D extension of the classic crossbar topology via 2T1M cross-points which still permits the parallel creation of partial products for faster multiplication with lower circuit complexity. Furthermore, we present a binary to high-radix data conversion circuit to complement the state-programming module of the previous work. A simulation-based validation of read/write multi-level memory operations from/to the 2T1M 3D memristive crossbar was performed using SPICE and a threshold-type switching model of a bipolar voltage-controlled memristor. Such realization of in-memory computations could lead to faster arithmetic algorithms in future memristive ALUs. [ABSTRACT FROM AUTHOR]
- Published
- 2016
15. Memristor Crossbar for Adaptive Synchronization.
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Gambuzza, Lucia Valentina, Frasca, Mattia, Fortuna, Luigi, Ntinas, Vasileios, Vourkas, Ioannis, and Sirakoulis, Georgios Ch.
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MEMRISTORS ,SYNCHRONIZATION ,CROSSBAR switches (Electronics) ,SWITCHING circuits ,ELECTRONIC circuits - Abstract
Nonlinear circuits may be synchronized with interconnections that evolve in time incorporating mechanisms of adaptation found in many biological systems. Such dynamics in the links is efficiently implemented in electronic devices by using memristors. However, the approach requires a massive amount of interconnections (of the order of N^2 , where $N$ is the number of nonlinear circuits to be synchronized). This issue is solved in this paper by adopting a memristor crossbar architecture for adaptive synchronization. The functionality of the structure is demonstrated, with respect to different switching characteristics, via a simulation-based evaluation using a behavioral threshold-type model of voltage-controlled bipolar memristor. In addition, we show that the architecture is robust to device variability and faults: quite surprisingly, when faults are localized, the performance of the approach may also improve as adaptation becomes more significant. [ABSTRACT FROM PUBLISHER]
- Published
- 2017
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16. Oscillation-Based Slime Mould Electronic Circuit Model for Maze-Solving Computations.
- Author
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Ntinas, Vasileios, Vourkas, Ioannis, Sirakoulis, Georgios Ch., and Adamatzky, Andrew I.
- Subjects
ELECTRONIC circuits ,MEMRISTORS ,PHYSARUM polycephalum - Abstract
The ability of slime mould to learn and adapt to periodic changes in its environment inspired scientists to develop behavioral memristor-based circuit models of its memory organization. The computing abilities of slime mould Physarum polycephalum have been used in several applications, including to solve mazes. This work presents a circuit-level bio-inspired maze-solving approach via an electronic model of the oscillatory internal motion mechanism of slime mould, which emulates the local signal propagation and the expansion of its vascular network. Our implementation takes into account the inherent noise existent in the equivalent biological circuit, so that its behavior becomes closer to the non-deterministic behavior of the real organism. The efficiency and generality of the proposed electronic computing medium was validated through SPICE-level circuit simulations and compared with data from two cardinally different biological experiments, concerning 1) enhancing of Physarum's protoplasmic tubes along shortest path and 2) chemo-tactic growth by diffusing chemo-attractants. [ABSTRACT FROM AUTHOR]
- Published
- 2017
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17. A Novel Design and Modeling Paradigm for Memristor-Based Crossbar Circuits.
- Author
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Vourkas, Ioannis and Sirakoulis, Georgios Ch.
- Abstract
Over 30 years ago L. Chua proposed the existence of a new class of passive circuit elements, which he called memristors and memristive devices. The unique electrical characteristics associated with them, along with the advantages of crossbar structures, have the potential to revolutionize computing architectures. A well-defined and effective memristor model for circuit design combined with a design paradigm based on well-understood underlying logic design principles would certainly accelerate research on nanoscale circuits and systems. Toward this goal, we propose a memristor crossbar circuit design paradigm in which memristors are modeled using the quantum mechanical phenomenon of tunneling. We use this circuit model to design and simulate various logic circuit designs capable of universal computation. Finally, we develop and present a new design paradigm for memristor-based crossbar circuits. [ABSTRACT FROM PUBLISHER]
- Published
- 2012
- Full Text
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18. In-Memory-Computing Realization with a Photodiode/Memristor Based Vision Sensor.
- Author
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Vasileiadis, Nikolaos, Ntinas, Vasileios, Sirakoulis, Georgios Ch., and Dimitrakis, Panagiotis
- Subjects
IMAGE sensors ,SILICON nitride ,EDGE computing ,HUMAN behavior models ,INTERNET of things - Abstract
State-of-the-art IoT technologies request novel design solutions in edge computing, resulting in even more portable and energy-efficient hardware for in-the-field processing tasks. Vision sensors, processors, and hardware accelerators are among the most demanding IoT applications. Resistance switching (RS) two-terminal devices are suitable for resistive RAMs (RRAM), a promising technology to realize storage class memories. Furthermore, due to their memristive nature, RRAMs are appropriate candidates for in-memory computing architectures. Recently, we demonstrated a CMOS compatible silicon nitride (SiN
x ) MIS RS device with memristive properties. In this paper, a report on a new photodiode-based vision sensor architecture with in-memory computing capability, relying on memristive device, is disclosed. In this context, the resistance switching dynamics of our memristive device were measured and a data-fitted behavioral model was extracted. SPICE simulations were made highlighting the in-memory computing capabilities of the proposed photodiode-one memristor pixel vision sensor. Finally, an integration and manufacturing perspective was discussed. [ABSTRACT FROM AUTHOR]- Published
- 2021
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19. Three Fingerprints of Memristor
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Adhikari, Shyam Prasad, Sah, Maheshwar Pd., Kim, Hyongsuk, Chua, Leon O., Chua, Leon, editor, Sirakoulis, Georgios Ch., editor, and Adamatzky, Andrew, editor
- Published
- 2019
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20. Everything You Wish to Know About Memristors but Are Afraid to Ask
- Author
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Chua, Leon, Chua, Leon, editor, Sirakoulis, Georgios Ch., editor, and Adamatzky, Andrew, editor
- Published
- 2019
- Full Text
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21. Multi-level resistance switching and random telegraph noise analysis of nitride based memristors.
- Author
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Vasileiadis, Nikolaos, Loukas, Panagiotis, Karakolis, Panagiotis, Ioannou-Sougleridis, Vassilios, Normand, Pascal, Ntinas, Vasileios, Fyrigos, Iosif-Angelos, Karafyllidis, Ioannis, Sirakoulis, Georgios Ch., and Dimitrakis, Panagiotis
- Subjects
- *
RANDOM noise theory , *SILICON nitride films , *COPPER films , *MEMRISTORS , *SILICON nitride , *NITRIDES , *METALLIC oxides - Abstract
Resistance switching devices are of special importance because of their application in resistive memories (RRAM) which are promising candidates for replacing current nonvolatile memories and realize storage class memories. These devices exhibit usually memristive properties with many discrete resistance levels and implement artificial synapses. The last years, researchers have demonstrated memristive chips as accelerators in computing, following new in-memory and neuromorphic computational approaches. Many different metal oxides have been used as resistance switching materials in MIM or MIS structures. Understanding of the mechanism and the dynamics of resistance switching is very critical for the modeling and use of memristors in different applications. Here, we demonstrate the bipolar resistance switching of silicon nitride thin films using heavily doped Si and Cu as bottom and top-electrodes, respectively. Analysis of the current-voltage characteristics reveal that under space-charge limited conditions and appropriate current compliance setting, multi-level resistance operation can be achieved. Furthermore, a flexible tuning protocol for multi-level resistance switching was developed applying appropriate SET/RESET pulse sequences. Retention and random telegraph noise measurements performed at different resistance levels. The present results reveal the attractive properties of the examined devices. [ABSTRACT FROM AUTHOR]
- Published
- 2021
- Full Text
- View/download PDF
22. Memristive learning cellular automata for edge detection.
- Author
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Karamani, Rafailia-Eleni, Fyrigos, Iosif-Angelos, Tsakalos, Karolos-Alexandros, Ntinas, Vasileios, Tsompanas, Michail-Antisthenis, and Sirakoulis, Georgios Ch.
- Subjects
- *
CELLULAR automata , *EDGE detection (Image processing) - Abstract
Memristors have been utilized as an unconventional computational substrate and gained interest as a medium to implement neuromorphic computations. A mathematical model that also proved its potential is Learning Cellular Automata, that is an amalgam of Cellular Automata and Learning Automata. The realization of the common characteristics of memristive circuits and Learning Cellular Automata can only lead to their combination. Namely, both manage to blend storage and processing capabilities in their basic entity. This study involves the definition of memristive circuits that realize the computing behavior of Learning Cellular Automata. An example of this methodology is provided with the description of the implementation of edge detection for image processing. [ABSTRACT FROM AUTHOR]
- Published
- 2021
- Full Text
- View/download PDF
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