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This article evaluates silicon carbide (SiC) mosfet’s reliability and ruggedness comprehensively between two widely employed device package types: common source and Kelvin source. Multiple accelerated lifetime tests are conducted to comprehensively investigate SiC mosfet’s reliability at both package and die levels. Specifically, a conventional high electric field test is applied to induce gate oxide degradation, whereas package degradation is investigated by the widely adopted power cycling test. To mimic gate oxide degradation patterns closer to realistic cases, an active channel gate bias test is proposed in this study, and a fair comparison is made regarding the device's degradation pattern in the conventional high electric field test. Throughout accelerated lifetime tests, devices’ electrical parameters, consumable lifetime, and end-of-life failure modes are comprehensively evaluated. For ruggedness comparison, a single-shot short-circuit test is conducted on both common-source and Kelvin-source packaged devices with the same die technique and configuration. Other than analytical discussions with experimental waveforms, failure analysis is also conducted to investigate the device's failure mode and root cause. In respect of experimental results in accelerated lifetime tests and short-circuit tests, the existence of the common-source inductance and resistance may mitigate the electrothermal stress applied on the chip with lower gate–source voltage under load current and results in mitigated device instability and longer consumable lifetime. [ABSTRACT FROM AUTHOR]

Gate-oxide degradation has been one of the major reliability challenges of SiC MOSFETs and should be monitored carefully to avoid unexpected power converter failures. Various precursors have been introduced in the literature for gate-oxide degradation monitoring. However, those proposed precursors are temperature dependent and it is highly challenging to eliminate temperature effects. In this article, two new temperature-independent precursors (Miller capacitance and gate–source capacitance changes) are proposed for gate-oxide degradation monitoring of SiC MOSFETs. During the accelerated aging tests under high electric field and high temperature, a consistent change in Miller capacitance and gate–source capacitance is reported for both common source and Kelvin source SiC MOSFETs. Also, the temperature sensitivity of each precursor is investigated. The proposed precursors enable the monitoring of gate-oxide degradation without decoupling the impact of package degradation. Based on the findings, a simple early warning in situ circuit is proposed to monitor gate-oxide aging. A comprehensive precursor comparison is provided to show the merits of the proposed precursors. Finally, the experimental results are presented to validate the efficacy of the in situ monitoring circuit. [ABSTRACT FROM AUTHOR]

Online junction temperature (Tj) measurement enables robust power converter operations by providing overtemperature protection and condition monitoring of the power devices. For SiC MOSFETs, the real-time (Tj) information is especially critical as limited field data are available regarding the reliability. In this article, utilizing the turn-on delay time as temperature sensitive electrical parameter, an online (Tj) measurement is realized through an intelligent gate drive. Specifically, the turn-on delay time is translated into the pulsewidth of a digital signal through the conditioning/logic circuits. During (Tj) measurements, the adjustable gate resistance circuit is activated to improve the measurement sensitivity beyond 600 ps/°C. Using the high-resolution capture module (300-ps resolution) in the system microcontroller, this pulsewidth is measured and then converted to junction temperature with a resolution of <0.5 °C. A prototype is built to validate the online (Tj) measurement method. The switching test results show that the circuit is able to precisely measure Td,on and offers a good linearity/sensitivity for (Tj) estimation. In the continuous operation, the junction temperature of a decapsulated device using an infrared camera and (Tj) obtained from the circuit match well with <1 °C difference under various operating conditions. In addition, the gate-oxide degradation's impact on Td,on is considered for SiC MOSFETs, and an aging compensation scheme is discussed to maintain the measurement accuracy throughout the device's lifetime. It is shown that the proposed circuit provides an accurate real-time (Tj) measurement for SiC MOSFETs, which can be deployed to improve the power converters’ reliability. [ABSTRACT FROM AUTHOR]

This article proposes a new complete condition monitoring method which can independently monitor both the threshold voltage drift and the packaging degradation accurately by monitoring only the reverse body diode voltage drop at different gate bias levels. The SiC MOSFETs are aged through an accelerated aging method and the corresponding changes in electrical parameters are periodically measured to assess their correlation with the state of the device's health. It has been revealed that the on-state resistance reveals the combination of gate oxide and package-related degradation while the threshold voltage mainly depicts gate oxide-related issues. Unlike these two parameters, the body diode voltage drop is found to independently indicate the state of device health both for package and gate oxide. This is caused by a unique secondary conduction mode of SiC MOSFETs in third-quadrant operation which is clearly disclosed with transition boundaries by a proposed body diode transfer characterization curve. In order to have a detailed condition information of the device with a simple circuit, monitoring the reverse body diode voltage drop at 0 and $-$ 5 V gate bias is proposed. The proposed condition monitoring method is implemented on a gate drive circuit and experimental results are given for two artificially degraded devices. The experimental results confirm that the proposed method can independently monitor both the gate oxide and packaging degradations accurately by monitoring a single precursor parameter. The proposed method can be integrated into the gate driver or converter itself to monitor SiC devices. [ABSTRACT FROM AUTHOR]

This paper presents an silicon carbide (SiC) MOSFET health condition monitoring method based on the switching transient measurements. Specifically, the device's turn-on time is used as the aging precursor, and a detection circuit is developed with picosecond resolution to detect the variations of the turn-on time. For this purpose, power cycles with constant junction temperature swings are applied on sample devices to accelerate their thermally triggered degradation. Over the aging process, device parameters are measured periodically using automated curve tracer to observe degradation-related changes. Also, a double pulse tester is used to evaluate devices’ switching transient changes throughout aging. Based on these results, both the theoretical discussions and experimental results imply that device turn-on time is a viable aging precursor and can be used to monitor device health at system start-up. High-resolution capture module of readily available system microcontroller is employed to measure the turn-on time through a simple auxiliary interface circuit on a buck converter. Experimental results show that onboard device aging can successfully be achieved during systems start-up in the order of microseconds. [ABSTRACT FROM AUTHOR]

In this article, an in situ SiC mosfet degradation monitoring method using readily available converter sensors is presented. Device's drain-source resistance in saturation and ohmic regions are employed as aging precursors to, respectively, indicate die and package-related degradations. The presented findings in this article are essential for low-cost and practical early warning systems in power electronics applications. To verify the effectiveness of the proposed method, a number of power-cycling tests are conducted to analyze aging process and fatigue mechanism. Device static parameters are measured throughout accelerated aging tests and the physical causes behind them are discussed in detail. It is shown that the drain-source resistance within saturation region at low gate bias can be used to indicate die-related degradation. Similarly, at full positive gate bias, device on-state drain-source resistance can be used to detect package-related degradation. In order to find out optimal variables such as applied gate bias, pulse duration, etc., a comprehensive single pulse test is conducted and the results are reported. Finally, the proposed degradation monitoring method is experimentally validated in the context of a three-phase inverter considering different sensor configurations and load types. [ABSTRACT FROM AUTHOR]

This paper presents a comprehensive study on degradation monitoring of silicon carbide mosfets and proposes an early warning method to detect aging. The proposed plug-in tool can be integrated to smart gate drivers or directly to power converters. During the accelerated aging tests (power cycling within safe operating area), several electrical parameters are monitored to find out critical signatures and precursors of failure. Among those, gate leakage current is identified as the most practical precursor, which exhibits consistent changes in all aged devices and is relatively easy to monitor. Due to its simple scheme and low cost, it can potentially be embedded into commercial gate drivers featuring improved reliability options. [ABSTRACT FROM AUTHOR]

The efforts for more reliable power conversion systems have been gaining momentum in recent years. The majority of the studies concerning reliability of power switches focus on the package-related failures, mainly caused by the cyclic thermal stress. The basic failure precursor for this type of stress has been identified as increased on-state resistance for power MOSFETs in the recent literature. On-state resistance monitoring during converter operation is a challenging and costly task as it requires current and voltage sensing circuits, which can block the high voltage across the switch during off-state to protect the measurement or control unit. This paper proposes a software frequency response analysis method to determine the health status of high-voltage power MOSFETs with high on-state resistance. This is achieved by analyzing and evaluating the variation in the plant model at double pole frequency using the same DSP that is used for control purposes. The proposed concept is analyzed for boost converter; however, it can be used to detect the on-state resistance variation in other types of converters operating in continuous condition mode (CCM). The proposed algorithm is embedded in a low cost DSP and experimentally verified on a dc/dc boost converter. [ABSTRACT FROM AUTHOR]

The research on noninvasive incipient fault diagnosis of power converters is very critical to avoid strenuous periodic checkups and costly interruptions. In many of the research studies, on-state resistance of power MOSFETs is identified as the fault precursor, and suggested to be monitored online for prognosis. In this paper, a condition monitoring algorithm is proposed for power MOSFETs of interleaved converters and integrated with the conventional current loops. The proposed technique utilizes on-state resistance information of the switches to adjust the current reference of each interleaving leg. In addition, a pulse-width adjustment method is proposed to avoid one current sensor and current-control loop. With the proposed scheme, the thermal stress on the aged device can be reduced, and the overall lifetime of the converter can be extended. The proposed approach is verified on two-leg interleaved converters both in simulation and experimentally. [ABSTRACT FROM AUTHOR]