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When the Vienna rectifier operates at unbalanced dc links, the conventional carried-based discontinuous pulsewidth modulation (CB-DPWM) strategy suffers from the neutral point (NP) voltage fluctuation and the input current distortion. An optimized CB-DPWM strategy adopting self-adjusted redundant clamping modes is proposed in this article to solve the above issues. To reduce the input current distortion under unbalanced dc links, the modulation waves of CB-DPWM are modified according to the subsector redivision, and the limited operation region can be obtained. To extend the operation range of the Vienna rectifier, the voltage vector trajectory of CB-DPWM is optimized combined with the current error minimization and the voltage loss area compensation. To minimize the NP voltage fluctuation, the redundant clamping modes under unbalanced dc links are self-adjusted in real time according to the unbalanced degree. Moreover, the NP voltage fluctuation of the proposed strategy is evaluated by the root mean square of the NP current fluctuation. The effectiveness of the proposed strategy is verified by experiments on a Vienna rectifier platform. [ABSTRACT FROM AUTHOR]

Electrolytic capacitorless Vienna rectifiers have many advantages, such as longer lifetime and higher power density. However, the reduced dc-link capacitance aggravates the voltage stress due to the neutral point (NP) fluctuation. In this article, a hybrid modulation strategy combining the modulations of redundant vector and compression vector is proposed, which can realize the NP voltage balance for electrolytic capacitorless Vienna rectifiers. On the basis of analyzing the limitation of NP-balance capability of conventional space vector pulsewidth modulation (PWM) strategy in the region of high modulation index, the negative influence of reduced capacitance on the NP fluctuation and the input current harmonics is revealed. To suppress the NP fluctuation, the compression coefficient is introduced to redistribute the duty cycles of voltage vector, which can reduce the negative effect of medium vector on the NP voltage. In addition, the phase voltage error is modeled to reduce the input current harmonics with the appropriate adjustment factor. The implementation of the proposed strategy is realized by the equivalent carrier-based PWM, which can avoid the sector judgment and angle calculation. By using the proposed strategy, the NP voltage balance and the input current harmonics reduction can be realized simultaneously. The effectiveness of the proposed strategy is verified on an electrolytic capacitorless Vienna rectifier platform. [ABSTRACT FROM AUTHOR]

To overcome the challenges of large reactive energy transmission loss and high current stress, which ocurr during the operation of auxiliary commutated circuit (ACC) of novel parallel resonant dc-link inverter (PRDCLI), an improved modulation strategy for reactive energy transmission loss is herein proposed based on the discontinuous pulsewidth modulation (DPWM), which adopts sawtooth carrier wave with alternating positive and negative slopes and shunt dead zone. Compared with the original modulation strategy, based on minimizing the ACC operation frequency, the proposed modulation strategy is able to realize all switches soft-switching, and avoid the superposition of resonant current and load current during the operation of ACC, thus, effectively reducing the reactive energy transmission loss and the current stress of auxiliary switches of the ACC. Under the proposed modulation strategy, the equivalent circuits in different operation modes are divided, and the operation principle, voltage/current stress, loss distribution, and optimal parameter design method of novel PRDCLI are researched. Eventually, the proposed modulation strategy is verified by experiments on a 5-kW/40-kHz prototype made by SiC mosfet. [ABSTRACT FROM AUTHOR]

An integrated zero common-mode voltage (ZCMV) modulation algorithm is developed in this article for dual-parallel neutral-point-clamped (NPC) inverters treated as an integrated system. While the conventional methods achieve CMV elimination with the cost of worse harmonic performance, the proposed method guarantees a ZCMV and better current quality simultaneously by taking advantage of the extra space vectors provided by paralleling. Specially designed switching sequences are developed to maintain a balanced neutral point of dc bus and keep the averaged value of the circulating current to be zero, ensuring the normal function of parallel NPC inverters. In addition, although the switching sequence design is complicated, a simple approach is proposed and implemented on a commonly used digital signal processor. A laboratory prototype is developed to test the system performance under steady-state conditions and dynamic process in grid-connected operation. Compared with the conventional ZCMV modulation, experimental results verify the effectiveness of the integrated modulation in eliminating the CMV, in addition to the dramatically reduced output current distortion. [ABSTRACT FROM AUTHOR]

Simultaneous wireless power and data transfer (SWPDT) is widely investigated because of the increasing requirement for real-time communication between the primary and secondary sides in wireless power transfer systems. This article classifies SWPDT systems into four categories according to the type and number of data channels and data carrier generation method. They are power carrier-based SWPDT system, high-frequency data carrier-based SWPDT system, multiple inductive channels SWPDT system, and inductive–capacitive hybrid channels SWPDT system, respectively. Four key issues, including cross-talk minimization, improvement of signal-to-noise ratio, modulation method for high data rate and low bit error rate, and special design to achieve full-duplex communication and improve misalignment tolerance, are discussed. The advantages, disadvantages, and applications of the four types of SWPDT systems are summarized. Finally, conclusions and outlook of the SWPDT system are given. [ABSTRACT FROM AUTHOR]

The overmodulation canimprove the utilization of dc-link voltage in the induction motor (IM) field-weakening (FW) control, thereby extending the maximum output torque. Nevertheless, the high modulation index (MI) will cause severe torque ripple. To figure out the relation between the torque ripple and MI, the amplitude of torque ripple with different MI is calculated quantitatively. Then, a torque quality evaluation function (TQEF) is designed to evaluate the torque quality in overmodulation-FW region by considering both fundamental torque extension and torque ripple suppression. On this basis, a modulation index optimization module is proposed for the maximum TQEF value realization. The analysis shows that the studied method could achieve the optimal trade-off between the fundamental torque extension and the torque ripple suppression. The TQEF value of the studied method is higher than that of the conventional six-step voltage method and the inscribed circle voltage method, meaning that the torque quality is optimized. Finally, the effectiveness of the studied method is verified experimentally on an advanced RISC machines (ARM)-based 3.7 kW IM platform. [ABSTRACT FROM AUTHOR]

Many reduced common mode voltage (CMV) modulation methods have been proposed for three-level inverters. However, most of them suffer from large current distortion because only part of the available base vectors is utilized. The interleaved paralleling can reduce both CMV and the output current distortion, though the CMV reduction is limited and large zero-sequence circulating current (ZSCC) is inevitably caused by the phase-shifted carriers. To further reduce the CMV while maintaining smaller current distortion and ZSCC, a five-level reduced CMV (RCMV) modulation method is proposed in this article, which treats the parallel inverters as a whole. Theoretical analysis reveals that the integrated modulation provides additional base vectors that contribute to smaller total harmonic distortion (THD) of the current, and the selected vectors ensure the nearest-three-vector synthesis and half-reduced CMV. The switching sequences design and neutral point balancing strategy are also developed for dual-parallel three-level inverters, ensuring that the average circulating current is zero and the neutral point voltage is balanced, which are both critical to the proper operation of parallel inverters. Superior performance in terms of CMV, THD, and ZSCC provided by the proposed method in comparison with conventional modulation is verified by comprehensive simulation and experimental results. [ABSTRACT FROM AUTHOR]

Although high-frequency circulating current exists in parallel-operated inverters, it has not attracted as much attention as low-frequency circulating current, and thus has not been analyzed in detail previously. In this paper, a mathematical model and analysis are presented, which reveal the spectrum components and their changing trends of the circulating currents caused by carrier phase differences. The impact of carrier phase difference on high-frequency circulating current is also analyzed and verified. A closed-loop control scheme is proposed to suppress the switching frequency circulating current caused by carrier phase difference. In addition, the deadbeat and closed-loop control are combined to suppress the low- and high-frequency circulating currents simultaneously, to improve the overall performance of circulating current suppression. The effectiveness of the proposed scheme is verified by the simulation and experimental results acquired from a laboratory platform. [ABSTRACT FROM AUTHOR]

Circulating current is an undesirable phenomenon in modular multilevel converter which should be attenuated to reduce current stress and power losses. This letter presents a comparative study of the active and passive circulating current suppression methods. Voltage penalty of the active circulating current control is derived, and design of the passive circulating current filter parameters is provided. Simulations and experiments are performed to validate the analysis. [ABSTRACT FROM PUBLISHER]

This paper proposes an asymmetric mode control for a modular multilevel converter (MMC) operating at low-frequency and low-output-voltage conditions. Differently from conventional symmetric operations, affected by large capacitor voltage ripples caused by the large dc-link voltage, with the proposed asymmetric mode MMC operations, one arm does not produce output current and applies the major dc-link voltage, whereas the other arm sustains almost all output current with low dc-link voltage. Variations of the power level in arms remain bounded and the MMC does not need any other power exchange technique such as high-frequency or harmonic current injection in a low-frequency/low-voltage condition to suppress the capacitor voltage ripple. The asymmetric control realization, and arm energy regulation and its optimization are presented in detail. Experimental and simulation results show that the proposed method is suitable for motor drives operating under 20 Hz. [ABSTRACT FROM AUTHOR]

Modular multilevel converters (MMC) represent an interesting and emerging topology in medium-voltage motor drive applications. The main challenge of using such a topology in variable-speed drives is the large voltage ripple of submodule capacitors at low speed with constant torque. In this paper, an improved circulating current injection method is proposed, which does not completely eliminate the capacitor voltage ripple, but maintains it bounded within reasonable values. As a result, magnitude of injected circulating current is reduced, leading to converter efficiency improvement and reduction of semiconductor current ratings. Dimensioning of submodule capacitance is also discussed, which is an important consideration when designing the MMCs in variable-speed drives. The proposed method has been successfully validated by simulation and experimental results. [ABSTRACT FROM AUTHOR]