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GaN-based enhancement-mode high-electron-mobility transistors (HEMTs) with a 25-nm-thick undoped GaN (u-GaN) cap underneath the gate metallization on ultrathin-barrier (UTB) AlGaN (<6 nm)/GaN heterostructures have been demonstrated. The presence of a thick u-GaN cap contributes to the increased depletion of the two-dimensional electron gas (2DEG) beneath the gate by polarization effects, resulting in an improvement of the threshold voltage (Vth) and a suppression of the off-state gate leakage (Ioff). The UTB HEMTs with a thick u-GaN cap exhibit normally-off operation with a Vth of 0.5 V, a maximum on-current of 232.1 mA/mm, an Ioff of 10−6 mA/mm, and a gate voltage swing of 7 V at a drain bias of 10 V. Thanks to the p-doping-free GaN cap, the device demonstrates excellent Vth stability under positive gate bias, which positions it as a promising candidate for future low-voltage GaN power applications. [ABSTRACT FROM AUTHOR]

III-nitride heterostructure-based metal–insulator–semiconductor high-electron-mobility transistors (MIS-HEMTs), compared with Schottky and p-GaN gate HEMTs, have demonstrated significant potential in the next-generation high-power electronic devices due to their exceptional gate reliability. This study presents a comprehensive investigation of threshold voltage (VTH) instability in III-nitride heterostructure-based MIS-HEMTs, with a specific emphasis on the interfaces of the multi-heterostructures. Two widely studied amorphous materials, namely, Al2O3 and SiNx, have been extensively examined as primary gate insulators in GaN-based MIS-HEMTs. To efficiently remove native oxides from the (Al)GaN surface, a novel in situ high-temperature remote plasma pretreatment (RPP) technique has been developed. This technique involves sequential application of NH3/N2 plasmas on the (Al)GaN surface before depositing the gate insulators using plasma-enhanced atomic layer deposition. The remarkable RPP process has proven to be a highly effective method for revealing atomic steps on the GaN surface, irrespective of whether the surface has undergone oxidation or etching processes. To further enhance the interface quality and potentially reduce bulk traps in the gate insulator, optimization of deposition temperature and post-deposition annealing conditions have been explored. Additionally, an electron-blocking layer, such as SiON, is incorporated into the MIS-HEMTs to prevent electron injection into bulk traps within the insulator. Novel characterization techniques including constant-capacitance and isothermal-mode deep-level transient spectroscopy have also been developed to explore the failure mechanisms in MIS-HEMTs. These techniques allow for the differentiation between bulk traps in the GaN epitaxy and those present within the gate insulators. This in-depth physical understanding provides valuable insights into the sources of failure in GaN-based MIS-HEMTs. [ABSTRACT FROM AUTHOR]

An unrecoverable degradation of gate leakage is observed in AlGaN/GaN high electron mobility transistors (HEMTs) under high OFF‐state drain bias stress up to 200 V. Current‐mode deep‐level transient spectroscopy is developed for in situ observation of evolution of traps in the HEMTs before and after stress. It is revealed that two discrete traps, with activation energy of 0.54 and 0.69 eV, have converted into a deeper and broader trap (0.86 eV) after the stress, along with an increased apparent capture cross section (from 1.71 × 10−17–1.11 × 10−15 cm2 to 9.05 × 10−15 cm2). The conversion lowers down the tunneling barrier between metal and the AlGaN barrier, which facilitates trap‐assisted gate leakage in reversed biased AlGaN/GaN HEMTs. Engineering of deep traps in the AlGaN/GaN epilayers is essential for promoting and upgrading of power capability of GaN‐based RF HEMTs. [ABSTRACT FROM AUTHOR]

A drain-controlled current-mode deep level transient spectroscopy (I-DLTS), was developed for investigation of Semi-ON-state current collapse in AlGaN/GaN high electron mobility transistors (HEMTs). By inserting a graded AlGaN back-barrier between the GaN channel and AlGaN buffer layer, hot-electron effect induced charging of buffer traps is effectively blocked, which contributes to a remarkable suppressed current collapse in AlGaN/GaN HEMTs under Semi-ON-state stress. A broad-distributed electron trap ${E}_{\text {T1}}$ , which features an energy level depth ${E}_{\text {C}}$ - ${E}_{\text {T}}$ and apparent capture cross section ${\sigma }_{\text {T}}$ of 0.25 ± 0.05 eV and $9.0\,\, {\pm } 1.0 {\times } 10^{-18}$ cm2, was verified to locate in the AlGaN buffer layer by I-DLTS. A combination of pulsed ${I}$ - ${V}$ and I-DLTS measurements, could be an effective method for in-situ study of current collapse mechanism in AlGaN/GaN HEMTs. [ABSTRACT FROM AUTHOR]

The physical mechanism of threshold voltage (VTH) instability in AlGaN/GaN metal-insulator-semiconductor high electron mobility transistors (MIS-HEMTs) was identified via capacitance-mode deep-level transient spectroscopy characterization. MIS-HEMTs with low-pressure chemical vapor deposited (LPCVD) SiNx as the gate insulator feature two distinctive trap-emission transients. The initial transient corresponds to emission of states at the SiNx/AlGaN interface, and the extracted density of state exhibits an exponential decay distribution. The subsequent transient is revealed due to hybrid emission of the interface and bulk states from the LPCVD-SiNx gate insulator, which features an activation energy higher than 1.1 eV and a capture cross section that ranges between 1 × 10−11 and 1 × 10−10 cm2. The bulk states in the LPCVD-SiNx gate insulator become charged under high gate voltage overdrive, leading to severe VTH instability in GaN-based MIS-HEMTs. [ABSTRACT FROM AUTHOR]

Rapid-thermal-chemical-vapor-deposition (RT-CVD) SiNx gate dielectric was utilized for the fabrication of enhancement-mode GaN-based metal–insulator–semiconductor high electron mobility transistors (MIS-HEMTs) on ultrathin-barrier AlGaN/GaN heterostructure. A plasma-enhanced-atomic-layer-deposited (PEALD) SiNx interfacial layer was adopted to mitigate the high-temperature RTCVD process-induced degradation of the dielectric/III-nitride interface. Based on the dc- and pulsed transfer measurement results, the device with the PEALD-SiNx interfacial layer exhibits low ${V}_{\text {TH}}$ -hysteresis (0.1 V at ${V}_{\text {GS}} = 1, 10$ V) and low interface trap density. Constant-capacitance deep-level transient spectroscopy and high-resolution transmission electron microscopy were also conducted to confirm the improvement of the interface quality. [ABSTRACT FROM AUTHOR]

A silicon nitride (SiNx) film deposited at 500 °C by plasma-enhanced atomic layer deposition (PEALD) is employed as the gate dielectric for GaN-based metal-insulator-semiconductor high electron mobility transistors (MIS-HEMTs). An interface enhancement technology featuring in situ low-damage NH3/N2 remote plasma pretreatments (RPPs) is developed prior to the SiNx gate dielectric deposition, which contributes to an improved surface morphology while remarkably suppressed interface oxides. It is revealed by constant-capacitance deep-level transient spectroscopy that both shallow and deep states at the PEALD-SiNx/III-nitride interface are reduced by about one order of magnitude by the RPP. The in situ RPP and PEALD-SiNx gate dielectric process are implemented into fabrication of enhancement-mode MIS-HEMTs on an ultrathin-barrier AlGaN/GaN heterostructure technology platform. The fabricated MIS-HEMTs deliver an improved threshold stability and maximum output current as compared with devices without the RPP. [ABSTRACT FROM AUTHOR]

The mechanism of current collapse in AlGaN/GaN high-electron-mobility transistors (HEMTs) passivated with low-pressure chemical vapor deposited (LPCVD)-SiN x layers, is revealed by a double-sweep current-voltage measurement of a dual-gate HEMT structure. It provides an in-situ observation of the trapping/de-trapping process of surface states in HEMTs under high-voltage switching stress, by examining the gate-to-gate surface-hopping leakage I S along with several critical features, such as sweeping-rate and voltage-dependent onset voltage, turn-on slope, onset voltage hysteresis, and current tailing, etc. It is also verified that the plasma-enhanced atomic layer deposited (PEALD) 3-nm -SiN x interfacial layer inserted between the LPCVD-SiN x passivation and the AlGaN barrier, is beneficial for suppressing the surface-trap-induced current collapse in AlGaN/GaN HEMTs. [Display omitted] • The mechanism of current collapse in AlGaN/GaN high-electron-mobility transistors (HEMTs) passivated with low-pressure chemical vapor deposited (LPCVD)-SiN x layers, is revealed by a double-sweep current-voltage measurement of a dual-gate HEMT structure combine DLTS. • It provides an in-situ observation of the trapping/de-trapping dynamic process of surface states in HEMTs under high-voltage switching stress. • It is also verified that the plasma-enhanced atomic layer deposited (PEALD) 3-nm -SiN x interfacial layer inserted between the LPCVD-SiN x passivation and the AlGaN barrier, is beneficial for suppressing the surface-trap-induced current collapse in AlGaN/GaN HEMTs. [ABSTRACT FROM AUTHOR]