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In this paper, the generalized and new cascaded modular multilevel inverter topology is presented that is designed with reduced power electronic components. Each module comprises ten power switches (2 bi-directional and 8 unidirectional) and five DC sources. Lower voltage rating switches are employed for this topology due to its remarkable advantage of generating both positive and negative voltage levels without using any H-bridge at the output. Various DC voltage magnitude or MLI algorithm of the proposed topology can be selected to obtain different voltage levels. The most optimal inverter algorithm is selected and further design a generalized cascaded structure for high voltage applications that requires lesser components and has better performance. The performance of the proposed optimal algorithm is determined and are compared with the various other state-of-art MLI topologies. The specimen 27-level inverter of the proposed configuration is modulated using the sinusoidal-PWM (SPWM) technique and is implemented in the laboratory prototype of the experimental setup using a d-SPACE 1103 controller. The performance parameters of the proposed topology stand better than other existing and compared MLI topologies in terms of the variety of DC sources, number of DC sources, number of voltage levels, and number of driver circuits. Regarding the economic reliability of the proposed inverter, total standing voltage (TSV), cost factor per level (CFL) have also been calculated. The experimental results of the 27-level output voltage at different load verify its performance. [ABSTRACT FROM AUTHOR]

Multilevel inverters (MLIs) have become more popular due to the high-quality output waveform with higher voltage levels, lower voltage stress across the power switches, and lower harmonic distortion of the output voltage. This paper introduces two new structures of MLI based on a modified T-type inverter and switched-diode cell. Proposed inverter topologies cascaded in series due to its generalized structure. Inherent property to generate the negative voltage levels without using any full H-bridge circuit is a key feature of the proposed topology. The merit of the proposed inverter is the reduction in power electronic components, the assessment has been carried out with some recent MLI topologies, and graphs relating to the performance parameters have also been incorporated as well. Besides, total standing voltage (TSV) and the level to switch ratio (LSR) is calculated for further clarification of the proposed inverter, and the parameters are compared with the newly developed MLI topologies. A multi-carrier pulse width modulation strategy (MC-PWM) is adopted for the generation of the switching pulses. [ABSTRACT FROM AUTHOR]

Reduction in the overall power devices such as power semi-conductor switches, gate drivers with the associated circuits and DC voltage sources reduces the size, cost, complexity in addition with enhancing the overall performance of the inverter. This paper presents a new and generalized multilevel inverter topology with reduced number of power components. To identify the significance of proposed inverter, the generalized formulae for all the parameters are calculated and a comprehensive comparison of different performance parameters are presented in tabular as well as in graphical form. Multicarrier pulse width modulation strategy is adopted for generating the switching pulses. Simulation of the proposed MLI topology for the 9-level and 17-level inverter have been performed in MATLAB/Simulink and the corresponding experimental results are incorporated for one unit and two units, respectively, experiments are carried out at RL load. Nevertheless, level per switch Ratio (L/S) is introduced and compared with some of the new discussed MLI topologies. Moreover, the switching and the conduction losses of the inverter are also calculated and incorporated in this paper. [ABSTRACT FROM AUTHOR]

Summary: The proposed work shows a novel multilevel inverter (MLI) configuration to generate a large number of voltage levels with lesser number of power switches. The proposed generalized inverter comprises basic cells cascaded to each other. Each cell of the proposed inverter can generate three‐level AC voltage using the power switches of the same rating. Both single‐phase and three‐phase MLI configurations are possible for the proposed structure. To validate the performance of the proposed MLI configuration, a nine‐level inverter using six power switches and a 27‐level inverter using nine power switches are designed and simulated in the MATLAB/Simulink environment. An experimental prototype is developed in the laboratory, and the experimental results are presented to verify the simulated results. Further, to validate the effectiveness of the proposed multilevel inverter, a comparison of the proposed MLI with recently proposed multilevel inverter has been incorporated in a detailed manner. [ABSTRACT FROM AUTHOR]

Summary: In this research work, a generalized structure of multilevel topology is proposed that can be extended by cascading the modules. Proposed modular topology is modified T‐type structure that requires comparative reduced number of power components than other existing structures of multilevel inverter. Each module encompasses of three DC sources and 10 power switches. Both positive and negative voltage levels can be generated without the use of H‐bridge inverter; thus, lower voltage rating power switches are employed for proposed modular topology. To generate the output voltage levels, the nearest level control is implemented on the experimental setup using dSPACE 1103 controller. To verify the performance of the proposed inverter, experimental validation of various topologies based on different algorithms is performed to generate 15‐level, 17‐level, 27‐level, and 31‐level at different load conditions. Moreover, different state‐of‐art topologies are compared with proposed topology in terms of the required number of voltage levels, DC sources, power switches, driver circuits, and total standing voltage. [ABSTRACT FROM AUTHOR]