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In this brief, the analysis, design, and measured results of a fully integrated 7-bit step attenuator implemented in a 0.25- $\mu \text{m}$ Silicon–Germanium (SiGe) BiCMOS process technology, are described. The attenuator is designed based on delicately ordered and cascaded $\Pi $ /T type attenuation blocks, which are comprised of series/shunt switches employing SiGe hetero-junction bipolar transistors (HBTs) with peak $f_{T}/f_{\max }$ of 110/180 GHz. HBTs are employed as a series switch to decrease the insertion-loss (IL) of the attenuator. Moreover, to the authors’ best knowledge, this is the first study presenting the effect of employing reverse-saturated HBTs as a shunt switch for each attenuation blocks. Thanks to this advancement, the highest input-referred 1-dB compression point (IP1dB) is reported for Si-based similar studies. This method also decreases the IL of the proposed attenuator. The measurements result in the state-of-the-art performance with 28.575-dB attenuation range by 0.225-dB gain steps while maintaining 7-bit amplitude resolution across 6.6 GHz–12.8 GHz frequency band, where RMS phase error remains below 3.3° and IL is less than 12.4 dB. The measured IP1dB of the attenuator is 13.5 dBm while drawing 8 mA from 3.3-V supply. The die occupies an area of 1.37 mm $\times \,\, 0.56$ mm excluding pads. [ABSTRACT FROM AUTHOR]

This letter describes the analysis, design, and measured results of a fully integrated single-pole double-throw (SPDT) switch developed in 0.25- \mu \textm silicon– germanium (SiGe) BiCMOS process technology, which features SiGe HBTs with peak fT/f{{\text {max}}} of 110/180 GHz. The switch is designed based on a shunt–shunt topology with a combination of various design and layout optimization approaches to improve the insertion loss (IL), isolation, and power handling capability. The designed switch including the applied techniques results in a measured IL of 2.3 dB and isolation of 32 dB at 8 GHz. The switch is able to attain a state-of-the-art input referred 1-dB compression point (IP1 dB) up to 30 dBm while drawing a current of 3 mA from a 6 V supply. The die has an area of only 775\,\,\mu \text m\,\,\times 820\,\,\mu \textm . To the author’s knowledge, the presented work is the first SPDT switch ever reported, that incorporates slow-wave transmission lines and reverse-saturated heterojunction bipolar transistors at the specified frequency range. [ABSTRACT FROM PUBLISHER]